Abstract: A computing system including two or more controllers, a universal asynchronous receiver-transmitter (UART) multiplexer, and a combinational logic circuit is provided. The two of more controllers include a first controller and a second controller. The first controller is configured to provide a first status signal and a first select control signal, and the second controller is configured to provide a second status signal and a second select control signal. The UART multiplexer is configured to provide UART output from at least a first UART input and a second UART input based on a UART select signal. The combinational logic circuit is configured to determine the UART select signal is one of the first select control signal or the second select control signal based at least in part on the first status signal and the second status signal.

Abstract: A multiple storage node system including a first and second node is provided. The first node includes a first baseboard management controller (BMC), a first flash ROM configured to store a first flash image, and a first switch device configured to connect the first BMC to the first flash ROM. The second node includes an exact configuration of the first node. The first BMC is connected to the second switch device, and the second flash image is the same as the first flash.

Abstract: Systems and methods are provided for preserving data in memory modules of a computer system. An exemplary method can detect that a software preservation process is needed for a computer system, and thereafter performs the software preservation process. The software preservation process can begin by detecting the initiation of a reduced power mode in a computer system. A syncing process of data contents can then be initiated in a processing unit of the computer system. Next, the computer system can automatically save data contents of a memory module. The software preservation process is completed by turning off a power supply unit of the computer system.

Abstract: An electronic device including a housing configured to house one or more electronic components, an air filter, a fan disposed within the housing, and an air pressure sensor disposed within the housing is disclosed. The air filter is disposed within an air inlet defined by the housing. The fan is configured to cause air to enter the housing via the air inlet such that the air flows through the air filter and within the housing. The air pressure sensor generates data used to determine air pressure values within the housing that are based at least in part on the air flowing through the air filter and within the housing. Based on the determined air pressure values from the air pressure sensor, a status of the air filter can be determined, and an indication that the air filter is in need of replacement can be generated and transmitted to a user.

Abstract: A multiple storage node system including a first and second node is provided. The first node includes a first baseboard management controller (BMC), a first flash ROM configured to store a first flash image, and a first switch device configured to connect the first BMC to the first flash ROM. The second node includes an exact configuration of the first node. The first BMC is connected to the second switch device, and the second flash image is the same as the first flash.

Abstract: The present disclosure provides a system and method for controlling a plurality of cooling fan modules using a management controller and a multiplex switch. The multiplex switch connects the management controller to the plurality of cooling fan modules. The multiplex switch can enable the management controller to select a specific cooling fan module from the plurality of cooling fan modules. Once the specific cooling fan module is selected, the multiplex switch can connect to the specific cooling fan module, enable the management controller to monitor operating characteristics of the specific cooling fan module, and control power or current being delivered to the specific cooling fan module.

Abstract: The present disclosure provides a system and method for controlling a plurality of cooling fan modules using a management controller and a multiplex switch. The multiplex switch connects the management controller to the plurality of cooling fan modules. The multiplex switch can enable the management controller to select a specific cooling fan module from the plurality of cooling fan modules. Once the specific cooling fan module is selected, the multiplex switch can connect to the specific cooling fan module, enable the management controller to monitor operating characteristics of the specific cooling fan module, and control power or current being delivered to the specific cooling fan module.

Abstract: Systems and methods are provided for preserving data in memory modules of a computer system. An exemplary method can detect that a software preservation process is needed for a computer system, and thereafter performs the software preservation process. The software preservation process can begin by detecting the initiation of a reduced power mode in a computer system. A syncing process of data contents can then be initiated in a processing unit of the computer system. Next, the computer system can automatically save data contents of a memory module. The software preservation process is completed by turning off a power supply unit of the computer system.

Abstract: A semiconductor device and an IC chip are described. The deep N-well region is configured in a substrate. The P-well region surrounds a periphery of the deep N-well region. The gate structure is disposed on the substrate of the deep N-well region. The P-body region is configured in the deep N-well region at one side of the gate structure. The first N-type doped region is configured in the P-body region. The second N-type doped region is configured pin the deep N-well region at the other side of the gate structure. The first isolation structure is disposed between the gate structure and the second N-type doped region. The N-type isolation ring is configured in the deep N-well region and corresponding to an edge of the deep N-well region, wherein a doping concentration of the N-type isolation ring is higher than that of the deep N-well region.

Abstract: A semiconductor device and an IC chip are described. The deep N-well region is configured in a substrate. The P-well region surrounds a periphery of the deep N-well region. The gate structure is disposed on the substrate of the deep N-well region. The P-body region is configured in the deep N-well region at one side of the gate structure. The first N-type doped region is configured in the P-body region. The second N-type doped region is configured pin the deep N-well region at the other side of the gate structure. The first isolation structure is disposed between the gate structure and the second N-type doped region. The N-type isolation ring is configured in the deep N-well region and corresponding to an edge of the deep N-well region, wherein a doping concentration of the N-type isolation ring is higher than that of the deep N-well region.

Abstract: The present invention discloses a method for concentrating charged particles and an apparatus thereof. The method comprises: providing a substrate comprising a reservoir; disposing a conducting granule in the reservoir, the conducting granule being negatively charged or positively charged and comprising nano-pores or nano-channels capable of permitting ion permeation; disposing a buffer solution in the reservoir, the buffer solution comprising counter-ions having an opposite electric property to the conducting granule; adding the charged particles into the buffer solution, the charged particles being co-ions having an identical electric property as the conducting granule; and applying an external electric field on the conducting granule.

Abstract: A method of manufacturing a semiconductor device is provided. First, a substrate is provided. The substrate includes a high-voltage device region and a low-voltage device region. The high-voltage device region has a source/drain predetermined region, a pick-up predetermined region and a channel predetermined region. A first dielectric layer is formed on the substrate. Then, the first dielectric layer in the low-voltage device region is removed along with the first dielectric layer in the source/drain predetermined region and the pick-up predetermined region. Afterwards, a second dielectric layer is formed in the low-voltage device region. The thickness of the second dielectric layer is smaller than the thickness of the first dielectric layer. Then, gates are formed in the channel predetermined region and the low-voltage device region respectively. Next, a source/drain region is formed in the substrate of the source/drain predetermined region.