Patents by Inventor Chun-Chong Chien

Chun-Chong Chien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250096153
    Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic component is disposed on a substrate and covered with an encapsulation layer, and a frame body is embedded in the encapsulation layer and protrudes from the substrate. Therefore, the frame body can disperse thermal stress, thereby preventing warping from occurring to the electronic package.
    Type: Application
    Filed: January 30, 2024
    Publication date: March 20, 2025
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Chien-Cheng LIN, Chun-Chong CHIEN, Shih-Shiung KUO
  • Publication number: 20240321769
    Abstract: An electronic package and a manufacturing method thereof are provided, in which a plurality of electronic components and a shielding part are disposed on a carrier structure, the shielding part is located between two of the electronic components, and the plurality of electronic components and the shielding part are covered by an encapsulating layer, where a surface of the shielding part has a protruding portion. Therefore, a periphery surface of the shielding part is a non-straight surface, so as to prevent the reflection of electromagnetic waves in the encapsulating layer from interfering with the signal transmission of the electronic components.
    Type: Application
    Filed: July 12, 2023
    Publication date: September 26, 2024
    Inventors: Chih-Hsien CHIU, Wen-Jung TSAI, Wan-Chin CHUNG, Chih-Chiang HE, Chun-Chong CHIEN
  • Publication number: 20240047374
    Abstract: An electronic package is provided with a plurality of electronic elements disposed on a carrier structure and a shielding structure located between two adjacent electronic elements, where the shielding structure is formed with at least one cavity and shielding members located on opposite sides of the cavity, such that the shielding members are arranged between the two electronic elements. Therefore, the electromagnetic signal will be reflected via the shielding members to prevent the two electronic elements from electromagnetically interfering with each other.
    Type: Application
    Filed: October 18, 2022
    Publication date: February 8, 2024
    Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
    Inventors: Chih-Hsien Chiu, Chih-Chiang He, Chun-Chong Chien, Wen-Jung Tsai
  • Patent number: 10566320
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: February 18, 2020
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chung, Te-Fang Chu
  • Publication number: 20190115330
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 18, 2019
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chung, Te-Fang Chu
  • Patent number: 10181458
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: January 15, 2019
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chun, Te-Fang Chu
  • Publication number: 20170040304
    Abstract: An electronic package is provided, including: a substrate having opposite first and second surfaces; at least a first electronic element disposed on the first surface of the substrate; a first encapsulant encapsulating the first electronic element; at least a second electronic element and a frame disposed on the second surface of the substrate; and a second encapsulant encapsulating the second electronic element. By disposing the first and second electronic elements on the first and second surfaces of the substrate, respectively, the invention allows a required number of electronic elements to be mounted on the substrate without the need to increase the surface area of the substrate. Since the volume of the electronic package does not increase, the electronic package meets the miniaturization requirement. The present invention further provides a method for fabricating the electronic package.
    Type: Application
    Filed: December 28, 2015
    Publication date: February 9, 2017
    Inventors: Chi-Liang Shih, Chun-Chong Chien, Hsin-Lung Chun, Te-Fang Chu