Patents by Inventor CHUN-CHUNG LIN

CHUN-CHUNG LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11937932
    Abstract: An acute kidney injury predicting system and a method thereof are proposed. A processor reads the data to be tested, the detection data, the machine learning algorithm and the risk probability comparison table from a main memory. The processor trains the detection data according to the machine learning algorithm to generate an acute kidney injury prediction model, and inputs the data to be tested into the acute kidney injury prediction model to generate an acute kidney injury characteristic risk probability and a data sequence table. The data sequence table lists the data to be tested in sequence according to a proportion of each of the data to be tested in the acute kidney injury characteristics. The processor selects one of the medical treatment data from the risk probability comparison table according to the acute kidney injury characteristic risk probability.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: March 26, 2024
    Assignees: TAICHUNG VETERANS GENERAL HOSPITAL, TUNGHAI UNIVERSITY
    Inventors: Chieh-Liang Wu, Chun-Te Huang, Cheng-Hsu Chen, Tsai-Jung Wang, Kai-Chih Pai, Chun-Ming Lai, Min-Shian Wang, Ruey-Kai Sheu, Lun-Chi Chen, Yan-Nan Lin, Chien-Lun Liao, Ta-Chun Hung, Chien-Chung Huang, Chia-Tien Hsu, Shang-Feng Tsai
  • Publication number: 20240096929
    Abstract: A method of making a semiconductor device includes forming a circuit layer over a substrate. The method further includes depositing an insulator over the substrate. The method further includes patterning the insulator to define a test line trench, a first trench, and a second trench, wherein the first trench is on a portion of the substrate exposed by the circuit layer. The method further includes filling the test line trench to define a test line electrically connected to the circuit layer. The method further includes filling the first trench and the second trench to define a capacitor.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Yan-Jhih HUANG, Chun-Yuan HSU, Chien-Chung CHEN, Yung-Hsieh LIN
  • Patent number: 11935894
    Abstract: An integrated circuit device includes a device layer having devices spaced in accordance with a predetermined device pitch, a first metal interconnection layer disposed above the device layer and coupled to the device layer, and a second metal interconnection layer disposed above the first metal interconnection layer and coupled to the first metal interconnection layer through a first via layer. The second metal interconnection layer has metal lines spaced in accordance with a predetermined metal line pitch, and a ratio of the predetermined metal line pitch to predetermined device pitch is less than 1.
    Type: Grant
    Filed: November 4, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Fong-yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin, Jerry Chang Jui Kao, Sheng-Hsiung Chen, Chin-Chou Liu
  • Publication number: 20240087986
    Abstract: A semiconductor device including a substrate, a semiconductor package, a thermal conductive bonding layer, and a lid is provided. The semiconductor package is disposed on the substrate. The thermal conductive bonding layer is disposed on the semiconductor package. The lid is attached to the thermal conductive bonding layer and covers the semiconductor package to prevent coolant from contacting the semiconductor package.
    Type: Application
    Filed: November 15, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee, Po-Fan Lin
  • Publication number: 20240038959
    Abstract: A display includes micro LEDs connected to a color conversion layer and driver ICs connected to the micro LEDs via an electrically connecting layer. Each micro LEDs includes an N pad and a P pad. The micro LEDs emit light of a same color, and the color conversion layer converts the light into various colors. The electrically connecting layer includes elongated negative electrodes connected to the N pads and elongated positive electrodes connected to the P pads. Each driver IC includes a first group of bonding pads on a face, a second group of bonding pads on an opposite face, and conductors for connecting the first group of bonding pads to the second group of bonding pads. Each bonding pad in the first group is connected to an elongated negative or positive electrode. The circuit board is connected to the second group of bonding pads of each driver IC.
    Type: Application
    Filed: October 13, 2023
    Publication date: February 1, 2024
    Inventors: CHIH-MENG WU, CHIEN-KUO TIEN, CHUN-CHUNG LIN
  • Publication number: 20220231209
    Abstract: A display includes micro LEDs connected to a color conversion layer and driver ICs connected to the micro LEDs via an electrically connecting layer. Each micro LEDs includes an N pad and a P pad. The micro LEDs emit light of a same color, and the color conversion layer converts the light into various colors. The electrically connecting layer includes elongated negative electrodes connected to the N pads and elongated positive electrodes connected to the P pads. Each driver IC includes a first group of bonding pads on a face, a second group of bonding pads on an opposite face, and conductors for connecting the first group of bonding pads to the second group of bonding pads. Each bonding pad in the first group is connected to an elongated negative or positive electrode. The circuit board is connected to the second group of bonding pads of each driver IC.
    Type: Application
    Filed: January 19, 2021
    Publication date: July 21, 2022
    Inventors: MENG-CHIH WU, CHIEN-KUO TIEN, CHUN-CHUNG LIN
  • Publication number: 20220164062
    Abstract: A touch panel includes a display substrate, pixel units supported on the display substrate, an electronic circuit for electrically connecting the pixel units to one another, and a molded resin portion for enclosing the pixel units. Each of the pixel units includes three miniature light-emitting diodes for emitting red light, green light and blue light respectively, a sensor, and a driver integrated circuit electrically connected to the miniature light-emitting diodes and the sensor.
    Type: Application
    Filed: November 20, 2020
    Publication date: May 26, 2022
    Inventors: MENG-CHIH WU, CHIEN-KUO TIEN, CHUN-CHUNG LIN
  • Publication number: 20220059605
    Abstract: A method for making a light-emitting device includes providing a driver IC wafer with multiple control circuits. Groups of tiny light-emitting diodes are stacked on the driver IC wafer and electrically connected to the control circuits. Each of the groups comprises a tiny light-emitting diode for emitting red light, a tiny light-emitting diode for emitting green light and a tiny light-emitting diode for emitting blue light. The groups of tiny light-emitting diodes on the driver IC wafer are packaged. The driver IC wafer is cut into driver integrated circuits. Each of the driver integrated circuits includes one of the control circuits electrically connected to one of the groups of tiny light-emitting diodes. Thus, pixel units are provided. The pixel units are transferred to a display substrate and the control circuits of the pixel units are connected to a circuit of the display substrate. Thus, a single light-emitting device is provided.
    Type: Application
    Filed: August 21, 2020
    Publication date: February 24, 2022
    Inventors: MENG-CHIH WU, CHIEN-KUO TIEN, CHUN-CHUNG LIN
  • Patent number: 10660212
    Abstract: The present disclosure provides an element submount and a method for manufacturing the same. The element submount includes a substrate, a first conductive heat-dissipating layer, a second conductive heat-dissipating layer, a first heat-dissipating layer and an element bonding layer. The substrate has opposite first and second surfaces. The first conductive heat-dissipating layer is formed on the first surface. The second conductive heat-dissipating layer is formed on the first surface and separated from the first conductive heat-dissipating layer. The first heat-dissipating layer is formed on the second surface. The element bonding layer is formed on the second conductive heat-dissipating layer. By electroplating and processing techniques, the edge of one or two sides of the element bonding layer exceeds an edge of the second conductive heat-dissipating layer and partially covers a side of the second conductive heat-dissipating layer.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: May 19, 2020
    Assignee: XSENSE TECHNOLOGY CORPORATION
    Inventors: Chen-Yu Li, Chia-Jung Chen, Yeu-Wen Huang, Chun-Chung Lin, Chih-Lung Lin
  • Publication number: 20190124774
    Abstract: The present disclosure provides an element submount and a method for manufacturing the same. The element submount includes a substrate, a first conductive heat-dissipating layer, a second conductive heat-dissipating layer, a first heat-dissipating layer and an element bonding layer. The substrate has opposite first and second surfaces. The first conductive heat-dissipating layer is formed on the first surface. The second conductive heat-dissipating layer is formed on the first surface and separated from the first conductive heat-dissipating layer. The first heat-dissipating layer is formed on the second surface. The element bonding layer is formed on the second conductive heat-dissipating layer. By electroplating and processing techniques, the edge of one or two sides of the element bonding layer exceeds an edge of the second conductive heat-dissipating layer and partially covers a side of the second conductive heat-dissipating layer.
    Type: Application
    Filed: October 4, 2018
    Publication date: April 25, 2019
    Inventors: Chen-Yu Li, Chia-Jung Chen, Yeu-Wen Huang, Chun-Chung Lin, Chih-Lung Lin
  • Publication number: 20160157157
    Abstract: The present invention relates to a wireless transmission system, which comprises at least an electronic device, a repeater, and a transceiver. The electronic device transmits a signal to the transceiver and the repeater. The repeater transmits the received signal to the transceiver. Thereby, when the transceiver is unable to receive the signal from the electronic device correctly due to the communication blind spot, the transceiver still can receive the signal of the electronic device via the repeater.
    Type: Application
    Filed: June 29, 2015
    Publication date: June 2, 2016
    Inventors: CORY KOON-SING LAM, CHUN-CHUNG LIN