Patents by Inventor Chun-De Lin

Chun-De Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7979606
    Abstract: A method for storing data is disclosed. The method is used for storing data into a program memory used for storing program codes. The program memory is divided into a first buffer storage area and a second buffer storage area. By alternate accessing of the first buffer storage area and the second buffer storage area, instantly accessible data can be stored in the program memory, such that the conventional data memory can be replaced by the program memory of the present invention and the cost of the product can be reduced.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: July 12, 2011
    Assignee: Compal Electronics, Inc.
    Inventors: Ming-Feng Liu, Chun-De Lin
  • Publication number: 20090119424
    Abstract: A method for storing data is disclosed. The method is used for storing data into a program memory used for storing program codes. The program memory is divided into a first buffer storage area and a second buffer storage area. By alternate accessing of the first buffer storage area and the second buffer storage area, instantly accessible data can be stored in the program memory, such that the conventional data memory can be replaced by the program memory of the present invention and the cost of the product can be reduced.
    Type: Application
    Filed: March 4, 2008
    Publication date: May 7, 2009
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Ming-Feng Liu, Chun-De Lin
  • Publication number: 20060259557
    Abstract: A method for controlling outgoing electronic mails is disclosed. The method automatically checks whether the inputted mailing address is one among a list of predetermined mailing addresses obtained by means of providing users with a new field for entering mailing addresses or clicking a predetermined button after entering mailing addresses. This prevents the need to exclude external mailing addresses or to re-enter mailing addresses and the disadvantage of incomplete information security due to deletion mistakes or omission.
    Type: Application
    Filed: July 29, 2005
    Publication date: November 16, 2006
    Inventors: Chun-De Lin, Yi-Hung Shen
  • Publication number: 20060176026
    Abstract: A method for charging and maintaining a rechargeable battery is provided. A time basis and a charging level are predetermined in the method. When the unused period of the battery does not exceeds the time basis, if the electric potential of the battery is more than the charging level, the battery will not be charged; otherwise, the battery will be charged. When the unused period of the battery exceeds the time basis, if the electric potential of the battery is more than the charging level, the battery will be discharged at first and then charged; otherwise, the battery will be directly charged.
    Type: Application
    Filed: July 15, 2005
    Publication date: August 10, 2006
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Yi-Hung Shen, Chun-De Lin
  • Patent number: 6974749
    Abstract: Embodiments of the present invention are directed to a method of forming a bottom oxide layer in the trench in semiconductor devices, such as Double-Diffused Metal-Oxide Semiconductor (DMOS) devices. In one embodiment, a method of forming a bottom oxide layer in a trench structure comprises providing a semiconductor substrate; forming a silicon nitride layer on the semiconductor substrate; forming a first oxide layer on the silicon nitride layer; forming a trench structure in the semiconductor substrate; forming a second oxide layer on a bottom and sidewalls of the trench and on a surface of the first oxide layer; removing the first oxide layer and the second oxide layer on the surface of the silicon nitride layer; and removing the second oxide layer on the sidewalls of the trench and a portion of the second oxide layer on the bottom of the trench.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: December 13, 2005
    Assignee: Mosel Vitelic, Inc.
    Inventors: Shih-Chi Lai, Yifu Chung, Yi-Chuan Yang, Jen-Chieh Chang, Jason Chien-Sung Chu, Chun-De Lin
  • Publication number: 20040203217
    Abstract: Embodiments of the present invention are directed to a method of forming a bottom oxide layer in the trench in semiconductor devices, such as Double-Diffused Metal-Oxide Semiconductor (DMOS) devices. In one embodiment, a method of forming a bottom oxide layer in a trench structure comprises providing a semiconductor substrate; forming a silicon nitride layer on the semiconductor substrate; forming a first oxide layer on the silicon nitride layer; forming a trench structure in the semiconductor substrate; forming a second oxide layer on a bottom and sidewalls of the trench and on a surface of the first oxide layer; removing the first oxide layer and the second oxide layer on the surface of the silicon nitride layer; and removing the second oxide layer on the sidewalls of the trench and a portion of the second oxide layer on the bottom of the trench.
    Type: Application
    Filed: October 1, 2003
    Publication date: October 14, 2004
    Applicant: MOSEL VITELIC, INC.
    Inventors: Shih-Chi Lai, Yifu Chung, Yi-Chuan Yang, Jen-Chieh Chang, Jason Chien-Sung Chu, Chun-De Lin