Abstract: A logic analyzer data processing method used in a logic analyzer having a control circuit adapted to read in test data from a test sample, a memory controlled by the control circuit to store the test data received from the test sample, and a display adapted to display the test data fetched by the control circuit from the memory, the method including the step of enabling the control circuit to drive a compressor to compress the test data received form the test sample before storing it in the memory, and to decompress the compressed test data before transmitting it from the memory to the display.

Abstract: A logic analyzer data retrieving method used in a logic analyzer formed of a control unit (11), a memory unit (12), and a data retrieving circuit (13), is disclosed to include the step of driving the data retrieving circuit of the logic analyzer to receive a time delay default value and to store in a buffer in a time delay circuit, and the step of triggering the preset of a first counter and transferring the default value from the buffer to the first counter to drive the first counter to start counting when a clock qualifier signal entered so as to obtain a complete clock enable signal when the first counter counted up to the default value and the output of the clock enable became low.

Abstract: A photographic type pointer positioning control device (200)for controlling the positioning of a pointer on a display (100)screen by means of photographing the display screen (100)with a video camera (230)and then processing the video signal thus obtained through an image out-line and recognition processing process and then computing the processed data through a computing unit into (240)a coordinate value corresponding to the aimed point of the video camera (230)at the display screen (100).

Abstract: A logic analyzer data processing method used in a logic analyzer (10) having a control circuit (17) adapted to read in test data from a test sample (13), a memory (18) controlled by the control circuit (17) to store the test data received from the test sample (13), and a display (161) adapted to display the test data fetched by the control circuit (17) from the memory (18), the method including the step of enabling the control circuit (17) to drive a compressor (19) to compress the test data received from the test sample (13) before storing it in the memory (18), and to depress the compressed test data before transmitting it from the memory (18) to the display (161).

Abstract: A programmable logic analyzer data analyzing method includes the step of controlling a control circuit to fetch waveform data from the test sample and to store fetched waveform data in a memory, the step of controlling the control circuit to transmit the waveform data from the memory to a computer through a transmission interface when the memory space of the memory used up (fully occupied), the step of driving the computer to write the received waveform data in a buffer thereof, and the step of running a test sample test signal auxiliary analyzing procedure for enabling the user to use the displayed on the display screen of the computer for making debugging data analysis, comparison data analysis and search data analysis, to store the analyzed data in the form of a file, or to print out the analyzed data through a printer.