Abstract: A method includes forming image sensors in a semiconductor substrate, thinning the semiconductor substrate from a backside of the semiconductor substrate, forming a dielectric layer on the backside of the semiconductor substrate, and forming a polymer grid on the backside of the semiconductor substrate. The polymer grid has a first refractivity value. The method further includes forming color filters in the polymer grid, wherein the color filters has a second refractivity value higher than the first refractivity value, and forming micro-lenses on the color filters.

Abstract: An image sensor device is provided. The image sensor device includes a substrate having a front surface, a back surface, and a light-sensing region. The image sensor device includes a first isolation structure extending from the front surface into the substrate. The first isolation structure surrounds a first portion of the light-sensing region, the first isolation structure has an etch stop layer, the etch stop layer has an end portion, and the end portion has an H-like shape. The image sensor device includes a second isolation structure extending into the substrate from the back surface to the end portion. The second isolation structure surrounds a second portion of the light-sensing region.

Abstract: In a method of fabricating an image sensor, a photosensor wafer is formed, comprising an array of photosensors. A signal processing wafer is formed, comprising signal processing circuitry configured to receive and process photocharge collected by the photosensors of the photosensor wafer. A storage wafer is formed, comprising metal-insulator-metal (MIM) storage elements. The photosensor wafer is secured to a first side of the storage wafer, thereby electrically connecting the photosensors of the photosensor wafer and MIM storage elements of the storage wafer. The signal processing wafer is secured to a second side of the storage wafer, thereby electrically connecting the MIM storage elements of the storage wafer with the signal processing circuitry of the signal processing wafer.

Abstract: A semiconductor structure includes a plurality of photosensitive elements in a semiconductor substrate. The semiconductor structure further includes a plurality of shallow trench isolation (STI) structures in the semiconductor substrate. The semiconductor structure further includes a plurality of pad openings in the semiconductor substrate, wherein the plurality of pad openings exposes a first STI structure of the plurality of STI structures. The semiconductor structure further includes a trench in a seal ring region of the semiconductor substrate, wherein the trench exposes a second STI structure of the plurality of STI structures, and the trench completely surrounds the plurality of photosensitive elements, wherein the plurality of pad openings are between the trench and the plurality of photosensitive elements.

Abstract: The present disclosure relates to a semiconductor image sensor with improved quantum efficiency. The semiconductor image sensor can include a semiconductor layer having a first surface and a second surface opposite of the first surface. An interconnect structure is disposed on the first surface of the semiconductor layer, and radiation-sensing regions are formed in the semiconductor layer. The radiation-sensing regions are configured to sense radiation that enters the semiconductor layer from the second surface and groove structures are formed on the second surface of the semiconductor layer.

Abstract: A pixel sensor includes a photodiode including an anode overlying a cathode positioned in a substrate and a transfer transistor structure including a source region extending along a surface of the substrate adjacent to the anode and overlying the cathode, a floating diffusion region extending along the surface of the substrate parallel to the source region, and a gate conductor including an array of conductive protrusions extending into the substrate between the source region and the floating diffusion region.

Abstract: A device includes a plurality of photodiode regions within a semiconductor substrate, a plurality of transistors over a front-side surface of the semiconductor substrate, a plurality of deep trench isolation (DTI) structures extending a first depth from a backside surface of the semiconductor substrate into the semiconductor substrate, and a plurality of isolation structures extending a second depth from the backside surface of the semiconductor substrate into the semiconductor substrate. The second depth is less than the first depth. One of the plurality of isolation structures has a quadrilateral outline on the backside surface of the semiconductor substrate. The isolation structure includes two triangular surfaces and two rectangular surfaces respectively extending from four sides of the quadrilateral outline.

Abstract: An image sensor includes a plurality of pixels. Each of the plurality of pixels includes a photodiode. Each pixel further includes a color filter over the photodiode. Each pixel further includes a first transparent conductive layer over the color filter. Each pixel further includes an electro-optical (EO) film over the first transparent conductive layer. Each pixel further includes a second transparent conductive layer over the EO film. Each pixel further includes a pillar of transparent conductive material electrically connecting the first transparent conductive layer and the second transparent conductive layer.

Abstract: A semiconductor image sensing structure includes a semiconductor substrate having a front side and a back side, a pixel sensor disposed in the semiconductor substrate, a transistor disposed over the front side of the semiconductor substrate, and a reflective structure disposed over the front side of the semiconductor substrate. A gate structure of the transistor and the reflective structure include a same material. A top surface of the gate structure of the transistor and a top surface of the reflective structure are aligned with each other.

Abstract: A semiconductor image-sensing structure includes a reflective grid and a reflective shield disposed over a substrate. The reflective grid is disposed in a first region, and the reflective shield is disposed in a second region separated from the first region. A thickness of the reflective shield is greater than a thickness of the reflective grid.

Abstract: A pixel sensor array may include a plurality of pixel sensors configured to generate color information associated with incident light, and a time of flight (ToF) sensor circuit configured to generate distance information associated with the incident light. The color information and the distance information may be used to generate a three-dimensional (3D) ToF color image. The ToF sensor circuit may be included under a DTI structure surrounding the plurality of pixel sensors in a top view of the pixel sensor array.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: A device includes a plurality of photodiode regions within a semiconductor substrate, a plurality of transistors, a plurality of deep trench isolation (DTI) structures, and a plurality of isolation structures. The transistors are over a front-side surface of the semiconductor substrate. The DTI structures extend a first depth from a backside surface of the semiconductor substrate into the semiconductor substrate. The isolation structures extend a second depth from the backside surface of the semiconductor substrate into the semiconductor substrate. The second depth is less than the first depth. From a plan view, each of the plurality of isolation structures has a triangular profile at the backside surface of the semiconductor substrate.

Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: A semiconductor device according to the present disclosure includes a semiconductor layer, a plurality of metal isolation features disposed in the semiconductor layer, wherein certain of the metal isolation features extend through the substrate to provide for full isolation between adjacent photodetectors and certain of the metal isolation features extend partially through the semiconductor layer to provide partially isolation between adjacent photodetectors.

Abstract: A method of making a semiconductor structure includes forming a pixel array region on a substrate. The method further includes forming a first seal ring region on the substrate, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The method further includes forming a first isolation feature in the first seal ring region, wherein forming the first isolation feature includes filling a first opening with a dielectric material, wherein the first isolation feature is a continuous structure surrounding the pixel array region. The method further includes forming a second isolation feature between the first isolation feature and the pixel array region, wherein forming the second isolation feature includes filling a second opening with the dielectric material.

Abstract: A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.

Abstract: A semiconductor image sensing structure includes a substrate having a first region and a second region, a metal grid in the first region, and a hybrid metal shield in the second region. The hybrid metal shield includes a first metallization layer, a second metallization layer disposed over the first metallization layer, a third metallization layer disposed over the second metallization layer, and a fourth metallization layer disposed over the third metallization layer. An included angle of the second metallization layer is between approximately 40° and approximately 60°.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: A method of manufacturing a transistor structure includes forming a plurality of trenches in a substrate, lining the plurality of trenches with a dielectric material, forming first and second substrate regions at opposite sides of the plurality of trenches, and filling the plurality of trenches with a conductive material. The plurality of trenches includes first and second trenches aligned between the first and second substrate regions, and filling the plurality of trenches with the conductive material includes the conductive material extending continuously between the first and second trenches.