Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: A semiconductor device according to the present disclosure includes a semiconductor layer, a plurality of metal isolation features disposed in the semiconductor layer, wherein certain of the metal isolation features extend through the substrate to provide for full isolation between adjacent photodetectors and certain of the metal isolation features extend partially through the semiconductor layer to provide partially isolation between adjacent photodetectors.

Abstract: A method of making a semiconductor structure includes forming a pixel array region on a substrate. The method further includes forming a first seal ring region on the substrate, wherein the first seal ring region surrounds the pixel array region, and the first seal ring region includes a first seal ring. The method further includes forming a first isolation feature in the first seal ring region, wherein forming the first isolation feature includes filling a first opening with a dielectric material, wherein the first isolation feature is a continuous structure surrounding the pixel array region. The method further includes forming a second isolation feature between the first isolation feature and the pixel array region, wherein forming the second isolation feature includes filling a second opening with the dielectric material.

Abstract: A semiconductor image sensing structure includes a substrate having a first region and a second region, a metal grid in the first region, and a hybrid metal shield in the second region. The hybrid metal shield includes a first metallization layer, a second metallization layer disposed over the first metallization layer, a third metallization layer disposed over the second metallization layer, and a fourth metallization layer disposed over the third metallization layer. An included angle of the second metallization layer is between approximately 40° and approximately 60°.

Abstract: A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.

Abstract: A method of manufacturing a transistor structure includes forming a plurality of trenches in a substrate, lining the plurality of trenches with a dielectric material, forming first and second substrate regions at opposite sides of the plurality of trenches, and filling the plurality of trenches with a conductive material. The plurality of trenches includes first and second trenches aligned between the first and second substrate regions, and filling the plurality of trenches with the conductive material includes the conductive material extending continuously between the first and second trenches.

Abstract: The present disclosure relates to an integrated chip including a substrate and a pixel. The pixel includes a photodetector. The photodetector is in the substrate. The integrated chip further includes a first inner trench isolation structure and an outer trench isolation structure that extend into the substrate. The first inner trench isolation structure laterally surrounds the photodetector in a first closed loop. The outer trench isolation structure laterally surrounds the first inner trench isolation structure along a boundary of the pixel in a second closed loop and is laterally separated from the first inner trench isolation structure. Further, the integrated chip includes a scattering structure that is defined, at least in part, by the first inner trench isolation structure and that is configured to increase an angle at which radiation impinges on the outer trench isolation structure.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: A stacked CMOS image sensor (CIS) structure is provided. The stacked CIS structure comprises a first die, a second die and a third die. The first die comprises a photodiode, a transfer gate, a selective conversion gain (SCG) switch, a reset switch, a floating node diffusion capacitor and a SCG diffusion capacitor. The second die comprises a source follower transistor and a row select switch. The third die comprises an image sensing circuit electrically connected to the third floating node.

Abstract: Implementations described herein reduce electron-hole pair generation due to silicon dangling bonds in pixel sensors. In some implementations, the silicon dangling bonds in a pixel sensor may be passivated by silicon-fluorine (Si—F) bonding in various portions of the pixel sensor such as a transfer gate contact via or a shallow trench isolation region, among other examples. The silicon-fluorine bonds are formed by fluorine implantation and/or another type of semiconductor processing operation. In some implementations, the silicon-fluorine bonds are formed as part of a cleaning operation using fluorine (F) such that the fluorine may bond with the silicon of the pixel sensor. Additionally, or alternatively, the silicon-fluorine bonds are formed as part of a doping operation in which boron (B) and/or another p-type doping element is used with fluorine such that the fluorine may bond with the silicon of the pixel sensor.

Abstract: An image sensor includes a first photodiode and a second photodiode. The image sensor further includes a first color filter over the first photodiode; and a second color filter over the second photodiode. The image sensor further includes a first microlens over the first color filter and a second microlens over the second color filter. The image sensor further includes a first electro-optical (EO) film between the first color filter and the first microlens, wherein a material of the first EO film is configured to change refractive index in response to application of an electrical field. The image sensor further includes a second EO film between the second color filter and the second microlens, wherein a material of the second EO film is configured to change refractive index in response to application of an electrical field.

Abstract: A method of detecting electromagnetic radiation includes illuminating a photodiode of a pixel sensor with electromagnetic radiation, using vertical gate structures of a transfer transistor to couple a cathode of the photodiode to an internal node of the pixel sensor, thereby generating an internal node voltage level, and generating an output voltage level of the pixel sensor based on the internal node voltage level.

Abstract: Some aspects of the present disclosure relate to a method. In the method, a semiconductor substrate is received. A photodetector is formed in the semiconductor substrate. An interconnect structure is formed over the photodetector and over a frontside of the semiconductor substrate. A backside of the semiconductor substrate is thinned, the backside being furthest from the interconnect structure. A ring-shaped structure is formed so as to extend into the thinned backside of the semiconductor substrate to laterally surround the photodetector. A series of trench structures are formed to extend into the thinned backside of the semiconductor substrate. The series of trench structures are laterally surrounded by the ring-shaped structure and extend into the photodetector.

Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: Some implementations described herein include a complementary metal oxide semiconductor image sensor device and techniques to form the complementary metal oxide semiconductor image sensor device. The complementary metal oxide semiconductor image sensor device includes a includes a first array of photodiodes stacked over a second array of photodiodes. A polarization structure is between the first array of photodiodes and the second array of photodiodes. Signaling generated by the first array of photodiodes (e.g., signaling corresponding to unpolarized light waves) may be multiplexed with signaling generated by the second array of photodiodes (e.g., signaling corresponding to polarized light waves). The complementary metal oxide semiconductor image sensor device further includes a filter structure that filters visible light waves and near infrared light waves amongst the first array of photodiodes and the second array of photodiodes.

Abstract: A method and wafer stack that includes a first wafer component, a second wafer component, and third wafer component. The first wafer component includes a frontside and a backside. The wafer stack also includes a second wafer component having a frontside and a backside, such that the frontside of the second wafer component is bonded to the frontside of the first wafer component. In addition, the wafer stack includes a third wafer component having a frontside and a backside, such that the frontside of the third wafer component is bonded to the backside of the second wafer component. The first wafer component includes a composite metal grid array with one or more photodiodes formed on the backside.

Abstract: Implementations described herein reduce electron-hole pair generation due to silicon dangling bonds in pixel sensors. In some implementations, the silicon dangling bonds in a pixel sensor may be passivated by silicon-fluorine (Si—F) bonding in various portions of the pixel sensor such as a transfer gate contact via or a shallow trench isolation region, among other examples. The silicon-fluorine bonds are formed by fluorine implantation and/or another type of semiconductor processing operation. In some implementations, the silicon-fluorine bonds are formed as part of a cleaning operation using fluorine (F) such that the fluorine may bond with the silicon of the pixel sensor. Additionally, or alternatively, the silicon-fluorine bonds are formed as part of a doping operation in which boron (B) and/or another p-type doping element is used with fluorine such that the fluorine may bond with the silicon of the pixel sensor.

Abstract: An array of nanoscale structures over photodiodes of a pixel array improves quantum efficiency (QE) for shorter wavelengths of light, such as green light and blue light. The nanoscale structures may be used without high absorption (HA) structures (e.g., when the pixel array is configured only for visible light) or may at least partially surround HA structures (e.g., when the pixel array is configured both for visible light and near infrared light). Additionally, the array of nanoscale structures may be formed using photolithography such that the nanoscale structures are approximately spaced at regular intervals. Therefore, QE for the pixel array is improved more than if the array of nanoscale structures were to be formed using a random (or quasi-random) process.

Abstract: Some implementations described herein provide a semiconductor structure. The semiconductor structure includes a first wafer including a first metal structure within a body of the first wafer. The semiconductor structure also includes a second wafer including a second metal structure within a body of the second wafer, where the first wafer is coupled to the second wafer at an interface. The semiconductor structure further includes a metal bonding structure coupled to the first metal structure and the second metal structure and extending through the interface.

Abstract: An image sensor device has a first number of first pixels disposed in a substrate and a second number of second pixels disposed in the substrate. The first number is substantially equal to the second number. A light-blocking structure disposed over the first pixels and the second pixels. The light-blocking structure defines a plurality of first openings and second openings through which light can pass. The first openings are disposed over the first pixels. The second openings are disposed over the second pixels. The second openings are smaller than the first openings. A microcontroller is configured to turn on different ones of the second pixels at different points in time.