Patents by Inventor Chunho Kim

Chunho Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145322
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a glass core layer, where the glass core layer includes a first major surface, a second major surface, and a cavity disposed between the first major surface and the second major surface of the glass core layer. The package also includes a die disposed in the cavity of the glass core layer, an encapsulant disposed in the cavity between the die and a sidewall of the cavity, a first patterned conductive layer disposed adjacent the first major surface of the glass core layer, and a second patterned conductive layer disposed adjacent the second major surface of the glass core layer. The die is electrically connected to at least one of the first and second patterned conductive layers.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: Chunho Kim, Mark E. Henschel
  • Patent number: 11883673
    Abstract: In some examples, an implantable medical device includes a battery, an electronics module electrically connected to the battery, and an elongated housing comprising a side wall positioned between the battery and an end cap, wherein the electronics module is positioned within the elongated housing between the battery and the end cap. The implantable medical device also includes an electrical contact assembly comprising a first spring contact and a second spring contact. The electrical contact assembly of the implantable medical device is positioned within the elongated housing between the electronics module and the battery or the end cap.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: January 30, 2024
    Assignee: Medtronic, Inc.
    Inventors: Andrew J. Ries, Chunho Kim, Mark E. Henschel, Robert A. Munoz, Christopher T. Kinsey, Jeffrey S. Voss
  • Patent number: 11876026
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a glass core layer, where the glass core layer includes a first major surface, a second major surface, and a cavity disposed between the first major surface and the second major surface of the glass core layer. The package also includes a die disposed in the cavity of the glass core layer, an encapsulant disposed in the cavity between the die and a sidewall of the cavity, a first patterned conductive layer disposed adjacent the first major surface of the glass core layer, and a second patterned conductive layer disposed adjacent the second major surface of the glass core layer. The die is electrically connected to at least one of the first and second patterned conductive layers.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: January 16, 2024
    Assignee: Medtronic, Inc.
    Inventors: Chunho Kim, Mark E. Henschel
  • Publication number: 20230420191
    Abstract: Various embodiments of an electrical component and a method of forming such component are disclosed. The electrical component includes a substrate having a first major surface, a second major surface, and a cavity disposed in the substrate. The cavity extends between the first major surface and the second major surface. The electrical component also includes an anode electrode that includes a conductive foil layer disposed on the second major surface of the substrate and over the cavity. Tantalum material is disposed within the cavity and includes tantalum particles. A dielectric layer is disposed on the tantalum particles, and an electrolyte cathode layer is disposed on the dielectric layer. The electrical component also includes a cathode electrode disposed over the cavity.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Inventors: Mark R. Boone, Joachim Hossick-Schott, Mark Henschel, Chunho Kim
  • Patent number: 11756741
    Abstract: Various embodiments of an electrical component and a method of forming such component are disclosed. The electrical component includes a substrate having a first major surface, a second major surface, and a cavity disposed in the substrate. The cavity extends between the first major surface and the second major surface. The electrical component also includes an anode electrode that includes a conductive foil layer disposed on the second major surface of the substrate and over the cavity. Tantalum material is disposed within the cavity and includes tantalum particles. A dielectric layer is disposed on the tantalum particles, and an electrolyte cathode layer is disposed on the dielectric layer. The electrical component also includes a cathode electrode disposed over the cavity.
    Type: Grant
    Filed: July 6, 2021
    Date of Patent: September 12, 2023
    Assignee: Medtronic, Inc.
    Inventors: Mark R. Boone, Joachim Hossick-Schott, Mark Henschel, Chunho Kim
  • Publication number: 20230248982
    Abstract: Various embodiments of a feedthrough assembly are disclosed. The assembly includes a header and a test fanout layer electrically connected to the header. A first major surface of the test fanout layer faces an inner surface of the header. The assembly further includes a test via extending between the first major surface and a second major surface of the test fanout layer, and a test pad disposed on the first major surface of the test fanout layer and electrically connected to the test via. At least a portion of the test pad is disposed between the outer surface of the header and a perimeter of the test fanout layer as viewed in a plane parallel to the first major surface of the test fanout layer such that the at least a portion of the test pad is exposed.
    Type: Application
    Filed: January 27, 2023
    Publication date: August 10, 2023
    Inventors: Andrew J. Ries, Mark E. Henschel, James R. Wasson, Chunho Kim, Walter E. Benecke, Kris A. Peterson, Jeff M. Wheeler, Songhua Shi
  • Publication number: 20230218911
    Abstract: Various embodiments of a feedthrough header assembly and a device including such assembly are disclosed. The assembly includes a header having an inner surface and an outer surface; a dielectric substrate having a first major surface and a second major surface, where the second major surface of the dielectric substrate is disposed adjacent to the inner surface of the header; and a patterned conductive layer disposed on the first major surface of the dielectric substrate, where the patterned conductive layer includes a first conductive portion and a second conductive portion electrically isolated from the first conductive portion. The assembly further includes a feedthrough pin electrically connected to the second conductive portion of the patterned conductive layer and disposed within a via that extends through the dielectric substrate and the header. The feedthrough pin extends beyond the outer surface of the header.
    Type: Application
    Filed: March 22, 2023
    Publication date: July 13, 2023
    Inventors: Andrew J. Ries, Chunho Kim, Robert A. Munoz, Christopher T. Kinsey, Jeffrey Voss, Kris A. Peterson, Mark E. Henschel
  • Patent number: 11633611
    Abstract: Various embodiments of a feedthrough header assembly and a device including such assembly are disclosed. The assembly includes a header having an inner surface and an outer surface; a dielectric substrate having a first major surface and a second major surface, where the second major surface of the dielectric substrate is disposed adjacent to the inner surface of the header; and a patterned conductive layer disposed on the first major surface of the dielectric substrate, where the patterned conductive layer includes a first conductive portion and a second conductive portion electrically isolated from the first conductive portion. The assembly further includes a feedthrough pin electrically connected to the second conductive portion of the patterned conductive layer and disposed within a via that extends through the dielectric substrate and the header. The feedthrough pin extends beyond the outer surface of the header.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: April 25, 2023
    Assignee: Medtronic, Inc.
    Inventors: Andrew J. Ries, Chunho Kim, Robert A. Munoz, Christopher T. Kinsey, Jeffrey Voss, Kris A. Peterson, Mark E. Henschel
  • Patent number: 11569178
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a core layer disposed between a first dielectric layer and a second dielectric layer, a die disposed in a cavity of the core layer, and an encapsulant disposed in the cavity between the die and a sidewall of the cavity. The package further includes a first patterned conductive layer disposed within the first dielectric layer, a device disposed on an outer surface of the first dielectric layer such that the first patterned conductive layer is between the device and the core layer, a second patterned conductive layer disposed within the second dielectric layer, and a conductive pad disposed on an outer surface of the second dielectric layer such that the second patterned conductive layer is between the conductive pad and the core layer.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: January 31, 2023
    Assignee: MEDTRONIC, INC.
    Inventors: Chunho Kim, Mark R. Boone, Randolph E. Crutchfield
  • Publication number: 20220157676
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a glass core layer, where the glass core layer includes a first major surface, a second major surface, and a cavity disposed between the first major surface and the second major surface of the glass core layer. The package also includes a die disposed in the cavity of the glass core layer, an encapsulant disposed in the cavity between the die and a sidewall of the cavity, a first patterned conductive layer disposed adjacent the first major surface of the glass core layer, and a second patterned conductive layer disposed adjacent the second major surface of the glass core layer. The die is electrically connected to at least one of the first and second patterned conductive layers.
    Type: Application
    Filed: February 3, 2022
    Publication date: May 19, 2022
    Inventors: Chunho Kim, Mark E. Henschel
  • Patent number: 11270920
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a glass core layer, where the glass core layer includes a first major surface, a second major surface, and a cavity disposed between the first major surface and the second major surface of the glass core layer. The package also includes a die disposed in the cavity of the glass core layer, an encapsulant disposed in the cavity between the die and a sidewall of the cavity, a first patterned conductive layer disposed adjacent the first major surface of the glass core layer, and a second patterned conductive layer disposed adjacent the second major surface of the glass core layer. The die is electrically connected to at least one of the first and second patterned conductive layers.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: March 8, 2022
    Assignee: Medtronic, Inc.
    Inventors: Chunho Kim, Mark E. Henschel
  • Publication number: 20220037092
    Abstract: Various embodiments of an electrical component and a method of forming such component are disclosed. The electrical component includes a substrate having a first major surface, a second major surface, and a cavity disposed in the substrate. The cavity extends between the first major surface and the second major surface. The electrical component also includes an anode electrode that includes a conductive foil layer disposed on the second major surface of the substrate and over the cavity. Tantalum material is disposed within the cavity and includes tantalum particles. A dielectric layer is disposed on the tantalum particles, and an electrolyte cathode layer is disposed on the dielectric layer. The electrical component also includes a cathode electrode disposed over the cavity.
    Type: Application
    Filed: July 6, 2021
    Publication date: February 3, 2022
    Inventors: Mark R. Boone, Joachim Hossick-Schott, Mark Henschel, Chunho Kim
  • Publication number: 20210272909
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a core layer disposed between a first dielectric layer and a second dielectric layer, a die disposed in a cavity of the core layer, and an encapsulant disposed in the cavity between the die and a sidewall of the cavity. The package further includes a first patterned conductive layer disposed within the first dielectric layer, a device disposed on an outer surface of the first dielectric layer such that the first patterned conductive layer is between the device and the core layer, a second patterned conductive layer disposed within the second dielectric layer, and a conductive pad disposed on an outer surface of the second dielectric layer such that the second patterned conductive layer is between the conductive pad and the core layer.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Inventors: Chunho Kim, Mark R. Boone, Randolph E. Crutchfield
  • Publication number: 20210187307
    Abstract: Various embodiments of a feedthrough header assembly and a device including such assembly are disclosed. The assembly includes a header having an inner surface and an outer surface; a dielectric substrate having a first major surface and a second major surface, where the second major surface of the dielectric substrate is disposed adjacent to the inner surface of the header; and a patterned conductive layer disposed on the first major surface of the dielectric substrate, where the patterned conductive layer includes a first conductive portion and a second conductive portion electrically isolated from the first conductive portion. The assembly further includes a feedthrough pin electrically connected to the second conductive portion of the patterned conductive layer and disposed within a via that extends through the dielectric substrate and the header. The feedthrough pin extends beyond the outer surface of the header.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Inventors: Andrew J. Ries, Chunho Kim, Robert A. Munoz, Christopher T. Kinsey, Jeffrey Voss, Kris A. Peterson, Mark E. Henschel
  • Patent number: 11031345
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a core layer disposed between a first dielectric layer and a second dielectric layer, a die disposed in a cavity of the core layer, and an encapsulant disposed in the cavity between the die and a sidewall of the cavity. The package further includes a first patterned conductive layer disposed within the first dielectric layer, a device disposed on an outer surface of the first dielectric layer such that the first patterned conductive layer is between the device and the core layer, a second patterned conductive layer disposed within the second dielectric layer, and a conductive pad disposed on an outer surface of the second dielectric layer such that the second patterned conductive layer is between the conductive pad and the core layer.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: June 8, 2021
    Assignee: Medtronic, Inc.
    Inventors: Chunho Kim, Mark R. Boone, Randolph E. Crutchfield
  • Publication number: 20210154772
    Abstract: A system may include an emitting device and a controller. The emitting device may be adapted to emit a first laser beam and a second laser beam. The controller may include one or more processors and may be operably coupled to the emitting device to control emission of the first and second laser beams. The controller may be adapted to remove a portion of a workpiece to form an exposed surface of the workpiece with the first laser beam using the emitting device and to remove a portion of the exposed surface with the second laser beam using the emitting device.
    Type: Application
    Filed: November 2, 2020
    Publication date: May 27, 2021
    Inventors: Xiangnan He, David A. Ruben, Mark E. Henschel, Chunho Kim, Yongqian Wang, Rodney D. Toles
  • Publication number: 20210121705
    Abstract: In some examples, an implantable medical device includes a battery, an electronics module electrically connected to the battery, and an elongated housing comprising a side wall positioned between the battery and an end cap, wherein the electronics module is positioned within the elongated housing between the battery and the end cap. The implantable medical device also includes an electrical contact assembly comprising a first spring contact and a second spring contact. The electrical contact assembly of the implantable medical device is positioned within the elongated housing between the electronics module and the battery or the end cap.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 29, 2021
    Inventors: Andrew J. Ries, Chunho Kim, Mark E. Henschel, Robert A. Munoz, Christopher T. Kinsey, Jeffrey S. Voss
  • Publication number: 20200154567
    Abstract: Various embodiments of an electrical component and a method of forming such component are disclosed. The electrical component includes a substrate having a first major surface, a second major surface, and an opening disposed in the substrate. The opening extends between the first major surface and the second major surface. Tantalum material is disposed within the opening. Further, the tantalum material includes tantalum particles. The electrical component also includes an anode electrode disposed on the first major surface of the substrate and over the opening and a cathode electrode disposed on the second major surface of the substrate and over the opening.
    Type: Application
    Filed: November 8, 2019
    Publication date: May 14, 2020
    Inventors: Chunho KIM, Mark E. HENSCHEL, Songhua SHI
  • Publication number: 20200111765
    Abstract: Various embodiments of an electronic assembly and a method of forming such assembly are disclosed. The electronic assembly includes a first integrated circuit package electrically connected to a second integrated circuit package. The first integrated circuit package includes a dielectric layer, a patterned conductive layer disposed within the dielectric layer, a device disposed on the first major surface of the dielectric layer and electrically connected to the patterned conductive layer, and an encapsulant layer disposed on the device and at least a portion of the first major surface of the dielectric layer. A conductive pillar of the second integrated circuit package is disposed within a trench of the first integrated circuit package such that the conductive pillar is electrically connected to a conductor disposed within the trench of the first integrated circuit package. The conductive pillar is electrically connected to a patterned conductive layer of the second integrated circuit package.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 9, 2020
    Inventors: Chunho KIM, Mark E. HENSCHEL, Yongqian WANG, Shawn SHI
  • Publication number: 20200058592
    Abstract: Various embodiments of an integrated circuit package and a method of forming such package are disclosed. The package includes a substrate having a core layer disposed between a first dielectric layer and a second dielectric layer, a die disposed in a cavity of the core layer, and an encapsulant disposed in the cavity between the die and a sidewall of the cavity. The package further includes a first patterned conductive layer disposed within the first dielectric layer, a device disposed on an outer surface of the first dielectric layer such that the first patterned conductive layer is between the device and the core layer, a second patterned conductive layer disposed within the second dielectric layer, and a conductive pad disposed on an outer surface of the second dielectric layer such that the second patterned conductive layer is between the conductive pad and the core layer.
    Type: Application
    Filed: August 9, 2019
    Publication date: February 20, 2020
    Inventors: Chunho KIM, Mark R. BOONE, Randolph E. CRUTCHFIELD