Patents by Inventor Chun Hoe YIK

Chun Hoe YIK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wafer level packaging for MEMS device
    Patent number: 10301171
    Abstract: A microelectromechanical system (MEMS) device is disclosed. The MEMS device includes a device substrate with a top device surface and a bottom device surface having a MEMS component in a device region. A top device bond ring is disposed on the top device surface surrounding the device region and a bottom device bond ring is disposed on the bottom device surface surrounding the device region. A top cap with a top cap bond ring is bonded to the top device bond ring by a top eutectic bond and a bottom cap with a bottom cap bond ring is bonded to the bottom device bond ring by a bottom eutectic bond. The eutectic bonds encapsulate the MEMS device.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: May 28, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Siddharth Chakravarty, Pradeep Yelehanka, Sharath Poikayil Poikayil Satheesh, Chun Hoe Yik, Rakesh Kumar, Natarajan Rajasekaran
  • WAFER LEVEL PACKAGING FOR MEMS DEVICE
    Publication number: 20190144265
    Abstract: A microelectromechanical system (MEMS) device is disclosed. The MEMS device includes a device substrate with a top device surface and a bottom device surface having a MEMS component in a device region. A top device bond ring is disposed on the top device surface surrounding the device region and a bottom device bond ring is disposed on the bottom device surface surrounding the device region. A top cap with a top cap bond ring is bonded to the top device bond ring by a top eutectic bond and a bottom cap with a bottom cap bond ring is bonded to the bottom device bond ring by a bottom eutectic bond. The eutectic bonds encapsulate the MEMS device.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 16, 2019
    Inventors: Siddharth CHAKRAVARTY, Pradeep YELEHANKA, Sharath Poikayil POIKAYIL SATHEESH, Chun Hoe YIK, Rakesh KUMAR, Natarajan RAJASEKARAN
  • CMOS COMPATIBLE WAFER BONDING LAYER AND PROCESS
    Publication number: 20150048509
    Abstract: A wafer bonding layer and a process for using the same for bonding wafers are presented. The wafer bonding process includes providing a first wafer, providing a second type wafer and providing a water bonding layer. The wafer bonding layer is provided separately on a contact surface layer of the first or second wafer as part of a CMOS compatible processing recipe.
    Type: Application
    Filed: August 14, 2014
    Publication date: February 19, 2015
    Inventors: Ranganathan NAGARAJAN, Fu Chuen TAN, Kia Hwee Samuel LOW, Chun Hoe YIK, Jiaqi WU, Jingze TIAN, Pradeep Ramachandramurthy YELEHANKA, Rakesh KUMAR