Patents by Inventor Chun Hsia
Chun Hsia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250201505Abstract: A fuse includes a circuit layer, a thermal resistance layer, a base layer and a top layer. The circuit layer includes a fuse wire and two inner electrodes. The inner electrodes are separately connected to two ends of the fuse wire. The thermal resistance layer is superposed to the circuit layer and has a thermal resistance room and two first conductors. The first conductors are disposed in the thermal resistance layer. Each first conductor is connected to one of the inner electrodes. The base layer is closely superposed to the thermal resistance layer and has two outer electrodes on the base layer, two second conductors in the base layer and a degassing passage in the base layer correspondingly to the thermal resistance room. The second conductor is connected to the outer electrode and the first connector. The top layer is closely superposed to the circuit layer.Type: ApplicationFiled: December 15, 2023Publication date: June 19, 2025Applicant: ONANO INDUSTRIAL CORP.Inventor: Chun-Hsia Chen
-
Patent number: 12229487Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: GrantFiled: April 28, 2023Date of Patent: February 18, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin-Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Publication number: 20240378362Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: ApplicationFiled: July 25, 2024Publication date: November 14, 2024Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin-Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Patent number: 11788972Abstract: A method of automatically setting optical parameters, using Automatic Optical Inspection (AOI) System, the method includes the following steps. Firstly, a recommended object image is obtained when the AOI system is set under a first recommended optical parameter set. Then, a computation is performed on an object standard picture and a recommended object image to obtain a recommended error value between the object standard picture and the recommended object image according to an optimized error function. Then, whether the recommended error value converges is determined. Then, when the recommended error value does not converge, a computation is performed to obtain a second recommended optical parameter set according to the recommended error value and the first recommended optical parameter set. Then when the recommended error value converges, the first recommended optical parameter set is decided as an optimal optical parameter set of the AOI system.Type: GrantFiled: April 29, 2021Date of Patent: October 17, 2023Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chi-Chun Hsia, Ya-Chu Chuang
-
Publication number: 20230326843Abstract: An electric contact structure includes an intermediate plate, spacer bars and a carrier plate. The spacer bars are sandwiched between the intermediate plate and the carrier plate. Wires are embedded in the intermediate plate, the spacer bars and the carrier plate. The wires in the spacer bars connect the wires in both the intermediate plate and the carrier plate to compose a three-dimensional connecting circuit. At least one end of each of the wires in the spacer bars is formed with a protrusive contact. An end of each of the wires in the intermediate plate or the carrier plate is formed with a cavity. The bottom of each cavity is provided with a disk contact connecting with one of the wires. Each protrusive contact is embedded into one of the cavities to form electric connection with corresponding one of the disk contacts.Type: ApplicationFiled: April 7, 2022Publication date: October 12, 2023Inventor: Chun-Hsia Chen
-
Publication number: 20230267264Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: ApplicationFiled: April 28, 2023Publication date: August 24, 2023Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin-Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Patent number: 11675953Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: GrantFiled: July 26, 2022Date of Patent: June 13, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin-Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Publication number: 20230147337Abstract: An LTCC package structure includes an interposer, two separators, a chip and a substrate. Chip I/O contacts and chip signal pathway nodes are disposed on a central portion and a peripheral portion of the interposer, respectively. The chip I/O contacts are electrically connected to the chip signal pathway nodes through transmission wires embedded in the interposer. The separators are provided with multiple signal junction wires therein. The chip is superposed on or under the interposer and electrically connected to the chip I/O contacts. Signal junction nodes are disposed on an upper surface of the substrate. Signal output contacts are disposed on a bottom surface of the substrate. The signal junction nodes are electrically connected to the signal output contacts through transmission wires embedded in the substrate. The substrate is superposed under the separators. The signal junction wires are electrically connected to the signal junction nodes.Type: ApplicationFiled: November 6, 2021Publication date: May 11, 2023Applicant: ONANO INDUSTRIAL CORP.Inventor: Chun-Hsia Chen
-
Publication number: 20230131658Abstract: An LTCC package structure includes an interposer, a semiconductor chip and a substrate. The interposer has a chamber therein. Multiple chip input/output (I/O) contacts are formed in the chamber. The chip I/O contacts are electrically connected to connecting wires disposed at a peripheral area of the interposer through transmission wires embedded in the interposer. The semiconductor chip is disposed in the chamber and electrically connected to the chip I/O contacts. Multiple signal contacts are disposed on a peripheral portion of an upper surface of the substrate. Multiple external contacts are disposed on a bottom surface of the substrate. The signal contacts are electrically connected to the external contacts through transmission wires embedded in the substrate. The signal contacts of the substrate separately electrically connect with the connecting wires of the interposer.Type: ApplicationFiled: October 27, 2021Publication date: April 27, 2023Applicant: ONANO INDUSTRIAL CORP.Inventor: Chun-Hsia Chen
-
Publication number: 20230126956Abstract: A method includes the steps of: a) providing an interposer, wherein the interposer has a chamber therein, multiple chip I/O contacts are formed in the chamber, and the chip I/O contacts are connected to connecting wires disposed in the interposer through transmission wires in the interposer; b) placing a semiconductor chip in the chamber and electrically connecting pins of the semiconductor chip to the chip I/O contacts; c) providing a substrate, wherein signal contacts and external contacts are disposed on two sides of the substrate, respectively, and the signal contacts are electrically connected to the external contacts through transmission wires embedded in the substrate; d) superposing the interposer on the substrate to form a combination, wherein the signal contacts of the substrate separately electrically connect with the connecting wires of the interposer; and e) encapsulating the combination with encapsulation adhesive.Type: ApplicationFiled: October 27, 2021Publication date: April 27, 2023Applicant: ONANO INDUSTRIAL CORP.Inventor: Chun-Hsia Chen
-
Publication number: 20230070377Abstract: An LTCC integrated circuit mold unit includes an integrated mold formed by multiple circuit mold units which are superposed, electrodes sheathed in the integrated mold and conductive wire sections sheathed in the integrated mold. Each circuit mold unit is formed by a ceramic base with an electrode pattern recess and a through hole. A denting depth of the electrode pattern recess is between 0.5 ?m and 5000 ?m. The through hole penetrates through the ceramic base. An inner diameter of the through hole is above 10 ?m. The electrode pattern recess is filled with a conductive material to form one of the electrodes. Each through hole is filled with the conductive material to form one of the conductive wire sections. The conductive wire sections which are vertically adjacent are connected to form a conductive path. The conductive path electrically connects to at least one of the electrodes.Type: ApplicationFiled: September 9, 2021Publication date: March 9, 2023Applicant: ONANO INDUSTRIAL CORP.Inventor: Chun-Hsia Chen
-
Publication number: 20220382947Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: ApplicationFiled: July 26, 2022Publication date: December 1, 2022Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin-Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Publication number: 20220373468Abstract: A method of automatically setting optical parameters, using Automatic Optical Inspection (AOI) System, the method includes: obtaining a recommended object image when the AOI system under a first recommended optical parameter set; performing computation on a standard image of a and a recommended image of the to-be-measured object according to an optimized error function to obtain a recommended error value between the standard image and the recommended image; determining whether the recommended error value converges, when determining that the recommended error value does not converge, performing computation according to the recommended error value and first recommended optical parameter set to obtain a second recommended optical parameter set; when the recommended error value converges, deciding the first recommended optical parameter set as the best optical parameter set of the AOI system.Type: ApplicationFiled: April 29, 2021Publication date: November 24, 2022Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chi-Chun HSIA, Ya-Chu CHUANG
-
Publication number: 20220367363Abstract: A low temperature co-fired ceramic (LTCC) electronic device includes a template layer, a base layer and a conductor. The template layer and the base layer are ceramic layers. The template layer has an electrode pattern formed by a hollow groove. A depth of the hollow groove is between 10 ?m and 120 ?m, and a width of the hollow groove is above 80 ?m. The base layer is closely overlapped with the template layer. An overlapping area range of the base layer and the template layer at least covers the electrode pattern. The conductor is filled in the hollow groove of the electrode pattern. A filling thickness of the conductor is above 10 ?m.Type: ApplicationFiled: May 17, 2021Publication date: November 17, 2022Applicant: ONANO INDUSTRIAL CORP.Inventor: Chun-Hsia Chen
-
Patent number: 11443095Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: GrantFiled: July 10, 2020Date of Patent: September 13, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Publication number: 20220012400Abstract: A method includes cropping a plurality of images from a layout of an integrated circuit, generating a first plurality of hash values, each from one of the plurality of images, loading a second plurality of hash values stored in a hotspot library, and comparing each of the first plurality of hash values with each of the second plurality of hash values. The step of comparing includes calculating a similarity value between the each of the first plurality of hash values and the each of the second plurality of hash values. The method further includes comparing the similarity value with a pre-determined threshold similarity value, and in response to a result that the similarity value is greater than the pre-determined threshold similarity value, recording a position of a corresponding image that has the result. The position is the position of the corresponding image in the layout.Type: ApplicationFiled: July 10, 2020Publication date: January 13, 2022Inventors: I-Shuo Liu, Chih-Chun Hsia, Hsin Ting Chou, Kuanhua Su, William Weilun Hong, Chih Hung Chen, Kei-Wei Chen
-
Patent number: 11193816Abstract: An embodiment of an equipment health state monitoring method adapted to monitor an equipment having a monitored part, including: obtaining a plurality of first values of the monitored part from a sensor in a first time period; extracting a plurality of first parameters from the first values; generating an equipment health state index model according to the first parameters; obtaining a plurality of second value from the sensor in a second time period after the first time period; extracting a plurality of second parameters from the second values; generating a plurality of equipment health state indices according to the second parameters and the equipment health state index model; generating a health state control chart according to the equipment health state indices; and determining whether each of the equipment health state indices locates in an alert area of the health state control chart and outputting a determination result accordingly.Type: GrantFiled: December 27, 2018Date of Patent: December 7, 2021Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chi-Chun Hsia, Wan-Jung Chang, Jun-Bin Yeh
-
Publication number: 20200371881Abstract: A data reading method of a data source system having duplicate data sources is provided. The data source system stores specified data in a primary data server and at least one backup data server. In the data reading method, a client terminal can read the specified data from any one of the primary data server and the at least one backup data server, but not only the primary data server, according to the access superiority of the data servers.Type: ApplicationFiled: May 20, 2020Publication date: November 26, 2020Inventor: MING CHUN HSIA
-
Publication number: 20200371844Abstract: A method for creating a virtual machine based on the hyper-converged infrastructure is provided. The method is adapted to be used in the hyper-converged infrastructure in which a control device controls a plurality of data servers. The method selects one data server to create the virtual machine according to a distribution status of the virtual-machine data across the data servers after receiving a request of creating the virtual machine.Type: ApplicationFiled: May 20, 2020Publication date: November 26, 2020Inventor: MING CHUN HSIA
-
Patent number: 10635741Abstract: A method and a system for analyzing a plurality of process factors affecting the trend of a continuous process are provided. The method includes the following steps: A plurality of similar time periods are selected from a time series. The trend of the continuous process in each of the similar time periods is similar to the trend of the continuous process in a current time period. A contribution of each of the process factors corresponding a monitoring target is analyzed according to the process factor values in the similar time periods and a plurality of monitor target values of the monitoring target. Part of the process factors are picked out according to the contributions.Type: GrantFiled: August 24, 2017Date of Patent: April 28, 2020Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chi-Chun Hsia, Jun-Bin Yeh, Li-Jie Chen, Ya-Chu Chuang