Patents by Inventor Chun-Hsien Wang

Chun-Hsien Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250142799
    Abstract: The invention provides a layout pattern of static random-access memory (SRAM), which comprises a substrate, wherein a plurality of diffusion regions and a plurality of gate structures are located on the substrate to form a plurality of transistors, wherein the plurality of gate structures comprise a first gate structure, which has a stepped shape when viewed from a top view, and the first gate structure spans a first diffusion region and a second diffusion region to form a first access transistor (PG1), wherein the first diffusion region is adjacent to and in direct contact with the second diffusion region.
    Type: Application
    Filed: December 28, 2023
    Publication date: May 1, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Yu-Tse Kuo, Shu-Ru Wang, Tsung-Hsun Wu, Liang-Wei Chiu, Chun-Hsien Huang
  • Publication number: 20250142815
    Abstract: A semiconductor device includes a substrate having a medium-voltage (MV) region and an one time programmable (OTP) capacitor region, a MV device on the MV region, and an OTP capacitor on the OTP capacitor region. Preferably, the MV device includes a first gate dielectric layer on the substrate, a first gate electrode on the first gate dielectric layer, and a shallow trench isolation (STI) adjacent to two sides of the first gate electrode. The OTP capacitor includes a fin-shaped structure on the substrate, a doped region in the fin-shaped structure, a second gate dielectric layer on the doped region, and a second gate electrode on the second gate dielectric layer.
    Type: Application
    Filed: November 27, 2023
    Publication date: May 1, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Yih Chen, Kuo-Hsing Lee, Chun-Hsien Lin, Wen-Chieh Chang, Kun-Szu Tseng, Sheng-Yuan Hsueh, Yao-Jhan Wang
  • Publication number: 20250126758
    Abstract: The present invention provides a rear-door heat dissipation system with a horizontally arranged and series-connected design comprising a heat dissipation cabinet, at least one condenser unit, and a heat dissipation device. The heat dissipation cabinet is provided therein with an active heat source device and a cabinet back door on one side of the heat dissipation cabinet, wherein the cabinet back door is provided with an air circulation unit. The condenser unit is provided on the cabinet back door, comprising a plurality of condensers. Wherein the circulation tube system of each of the condensers comprises a first and second main-channel aluminum tube, and aluminum flat tubes. Each aluminum flat tube has two ends respectively connecting to the first and second main-channel aluminum tube. An airflow channel is formed between each two adjacent aluminum flat tubes to enable air circulation, and each airflow channel is provided with an aluminum fin.
    Type: Application
    Filed: September 3, 2024
    Publication date: April 17, 2025
    Inventors: Cheng-Chien WAN, Cheng-Jui WAN, Chun-Hsien SU, Hui-Fen HUANG, Fong Jou TU, Chi Cheng CHEN, Chuan Meng WANG
  • Publication number: 20250107040
    Abstract: The present invention provides an immersion heat exchange system comprising cooling equipment and heat exchange equipment connected to the cooling equipment. The cooling equipment comprises a primary container and at least one cooling tank provided in the primary container. The cooling tank holds a cooling liquid for an active heat source device to be immersed in the cooling liquid. The heat exchange equipment comprises a secondary container and at least one heat exchange tank provided in the secondary container. The heat exchange tank provided therein with at least one condenser. The condenser divides the heat exchange tank into an input portion and an output portion. There is at least one circulation device corresponding to and working with the input portion and/or the output portion of the heat exchange tank to make the cooling liquid exchanged and circulated between the cooling tank and the heat exchange tank.
    Type: Application
    Filed: May 8, 2024
    Publication date: March 27, 2025
    Inventors: CHENG-CHIEN WAN, CHENG-JUI WAN, CHUN-HSIEN SU, HUI-FEN HUANG, FONG JOU TU, CHI CHENG CHEN, CHUAN MENG WANG
  • Publication number: 20250107041
    Abstract: A heat exchanger module for immersion cooling system includes cooling equipment and heat exchange equipment connected to the cooling equipment. The cooling equipment includes a primary container and at least one cooling tank provided in the primary container. The cooling tank holds a cooling liquid for an active heat source device to be immersed in the cooling liquid. The heat exchange equipment includes a secondary container and at least one heat exchange tank provided in the secondary container. The heat exchange tank is provided therein with at least one condenser. The condenser divides the heat exchange tank into an input portion and an output portion. There is at least one circulation device corresponding to and working with the input portion and/or the output portion of the heat exchange tank to make the cooling liquid exchanged and circulated between the cooling tank and the heat exchange tank.
    Type: Application
    Filed: September 12, 2024
    Publication date: March 27, 2025
    Inventors: Cheng-Chien WAN, Cheng-Jui WAN, Chun-Hsien SU, Hui-Fen HUANG, Fong Jou TU, Chi Cheng CHEN, Chuan Meng WANG
  • Publication number: 20250096145
    Abstract: An electronic packaging structure including a first circuit structure and a second circuit structure is provided. An electronic component is disposed between the first circuit structure and the second circuit structure. At least one of the first circuit structure and the second circuit structure (for example, the second circuit structure) has a cavity. The electronic component is embedded in the cavity, and may be encapsulated between the first circuit structure and the second circuit structure.
    Type: Application
    Filed: December 2, 2024
    Publication date: March 20, 2025
    Applicant: Unimicron Technology Corp.
    Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan, Chun-Hsien Chien
  • Publication number: 20250095724
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Application
    Filed: December 2, 2024
    Publication date: March 20, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu- Feng Chang, Chun-Chieh Chang
  • Patent number: 12253313
    Abstract: A heat dissipation device for a multipoint heat source includes an evaporator unit and a condenser unit. The evaporator unit includes a multi-channel duct. At least one narrow side of the multi-channel duct has a communication opening in communication with the bottom side of at least one tube of the condenser unit, and a wide side of the multi-channel duct is attached to the multipoint heat source so that a heat conduction medium can be circulated through the evaporator unit and the condenser unit while alternating between a liquid phase and a gaseous phase.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: March 18, 2025
    Assignee: MAN ZAI INDUSTRIAL CO., LTD.
    Inventors: Cheng-Chien Wan, Cheng-Rui Wan, Chun-Hsien Su, Hui-Fen Huang, Fong Jou Tu, Chi Cheng Chen, Chuan Meng Wang
  • Publication number: 20250074247
    Abstract: The present disclosure provides a smart pole charging system and a monitoring method. The database system initiates a configuration according to an original environmental status. The charging module is connected with an electric vehicle and provides the electrical energy to the electric vehicle. The monitoring module monitors a real-time environmental status around corresponding smart pole. The calculating module recognizes the real-time environmental status and outputs a calculation result. The router receives the calculation result. The cloud platform is communicated with the router and the database system. The router transmits the calculation result to the cloud platform through an open charge point protocol.
    Type: Application
    Filed: October 18, 2023
    Publication date: March 6, 2025
    Inventors: Ting-Chi Chang, Chun-Ta Chen, Che-Hsien Lien, Yu-Cheng Lee, Tien-Chun Wang, Chun-Wei Hu
  • Publication number: 20250079414
    Abstract: An electronic package module and a method for fabrication of the same are provided. The method includes providing an electronic component assembly and a circuit substrate. The electronic component assembly includes two electronic components and a conductive structure. The electronic components are connected to each other through a conductive adhesive material, while the electronic components are connected to the conductive structure through another conductive adhesive material. A soldering material is formed on the circuit substrate, and the electronic component assembly is disposed on the soldering material. The melting points of the conductive adhesive materials are higher than the melting point of the soldering material. As a result, the conductive adhesive materials are prevented from failure during the soldering process, and thus the process yield is improved.
    Type: Application
    Filed: January 16, 2024
    Publication date: March 6, 2025
    Inventors: KUO-HSIEN LIAO, LI-CHENG SHEN, HUNG-YI TSAI, CHAO-HSUAN WANG, CHUN-MING CHEN, TAI-LIN WU, CHIH-SHIEN CHEN, PING-CHI HUNG
  • Publication number: 20250072015
    Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate having a non-metal-oxide semiconductor capacitor (non-MOSCAP) region and a MOSCAP region, forming a fin-shaped structure on the MOSCAP region, forming a shallow trench isolation (STI) around the substrate and the fin-shaped structure, performing a first etching process to remove part of the STI on the MOSCAP region, and then performing a second etching process to remove part of the STI on the non-MOSCAP region and the MOSCAP region.
    Type: Application
    Filed: September 20, 2023
    Publication date: February 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Yih Chen, Kuo-Hsing Lee, Chun-Hsien Lin, Kun-Szu Tseng, Sheng-Yuan Hsueh, Yao-Jhan Wang
  • Publication number: 20250063803
    Abstract: A method for fabricating a semiconductor device includes the steps of first providing a substrate having a non-metal-oxide semiconductor capacitor (non-MOSCAP) region and a MOSCAP region, forming a first fin-shaped structure on the MOSCAP region, performing a monolayer doping (MLD) process on the first fin-shaped structure, and then performing an anneal process for driving dopants into the first fin-shaped structure. Preferably, the MLD process is further accomplished by first performing a wet chemical doping process on the first fin-shaped structure and then forming a cap layer on the non-MOSCAP region and the MOSCAP region.
    Type: Application
    Filed: September 14, 2023
    Publication date: February 20, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Yih Chen, Kuo-Hsing Lee, Chun-Hsien Lin, Kun-Szu Tseng, Sheng-Yuan Hsueh, Yao-Jhan Wang
  • Patent number: 12224001
    Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: February 11, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
  • Publication number: 20250040213
    Abstract: A semiconductor structure includes a source/drain feature in the semiconductor layer. The semiconductor structure includes a dielectric layer over the source/drain feature. The semiconductor structure includes a silicide layer over the source/drain feature. The semiconductor structure includes a barrier layer over the silicide layer. The semiconductor structure includes a seed layer over the barrier layer. The semiconductor structure includes a metal layer between a sidewall of the seed layer and a sidewall of the dielectric layer, a sidewall of each of the silicide layer, the barrier layer, and the metal layer directly contacting the sidewall of the dielectric layer. The semiconductor structure includes a source/drain contact over the seed layer.
    Type: Application
    Filed: July 27, 2023
    Publication date: January 30, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company Ltd.
    Inventors: Yi-Hsiang Chao, Peng-Hao Hsu, Yu-Shiuan Wang, Chi-Yuan Chen, Yu-Hsiang Liao, Chun-Hsien Huang, Hung-Chang Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Publication number: 20250040228
    Abstract: The present invention provides a method for forming a layout pattern of static random access memory, comprising forming a PU1 (first pull-up transistor), a PU2 (second pull-up transistor), a PD1A (first pull-down transistor), a PD1B (second pull-down transistor), a PD2A (third pull-down transistor), a PD2B (fourth pull-down transistor), a PG1A (first access transistor), a PG1B (second access transistor), a PG2A (third access transistor) and a PG2B (fourth access transistor) located on the substrate. The PD1A and the PD1B are connected in parallel with each other, the PD2A and the PD2B are connected in parallel with each other, wherein the gate structures include a first J-shaped gate structure, and the first J-shaped gate structure is an integrally formed structure.
    Type: Application
    Filed: October 16, 2024
    Publication date: January 30, 2025
    Applicant: UNITED MICROELECTRONICS CORP
    Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Chien-Hung Chen, Li-Ping Huang, Chun-Yen Tseng
  • Publication number: 20210113492
    Abstract: The present disclosure provides a method for inhibiting proliferation and metastasis of cancer cells by using a naphthoquinone derivative.
    Type: Application
    Filed: July 9, 2020
    Publication date: April 22, 2021
    Inventors: Linyi Chen, Yu-Jung Chang, Yen-Chi Tsao, Chun-Hsien Wang
  • Patent number: 8703640
    Abstract: The invention discloses a preparation method of nano-scale platinum (Pt) using an open-loop reduction system. The preparation method comprises the steps of: utilizing carbon nanotubes (CNTs) as a catalyst support; mixing platinum salt with a reducing agent and deionized water to form a precursor solution in a flask; heating the precursor solution in the flask at a predetermined temperature range to reduce nano-scale platinum nanoparticles on the carbon nanotubes by the process of water evaporation; allowing the water vapor to flow through a connection tube to a condenser; filling a cooling substance into the condenser via the first opening and draining the cooling substance from the condenser via the second opening to lower the temperature of the water vapor in the inner tube by the cooling substance and condense the water vapor into liquid water, which is collected with a beaker placed under the condenser.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: April 22, 2014
    Inventors: Fan-Gang Tseng, Yi-Shiuan Wu, Shin-Mei Gong, Chun-Hsien Wang
  • Publication number: 20140018233
    Abstract: The invention discloses a preparation method of nano-scale platinum (Pt) using an open-loop reduction system. The preparation method comprises the steps of: utilizing carbon nanotubes (CNTs) as a catalyst support; mixing platinum salt with a reducing agent and deionized water to form a precursor solution in a flask; heating the precursor solution in the flask at a predetermined temperature range to reduce nano-scale platinum nanoparticles on the carbon nanotubes by the process of water evaporation; allowing the water vapor to flow through a connection tube to a condenser; filling a cooling substance into the condenser via the first opening and draining the cooling substance from the condenser via the second opening to lower the temperature of the water vapor in the inner tube by the cooling substance and condense the water vapor into liquid water, which is collected with a beaker placed under the condenser.
    Type: Application
    Filed: November 21, 2012
    Publication date: January 16, 2014
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: FAN-GANG TSENG, YI-SHIUAN WU, SHIN-MEI GONG, CHUN-HSIEN WANG
  • Publication number: 20050153054
    Abstract: A method for manufacturing a multicolored three-dimensional candy has the steps of heating materials, mixing pigment with the heated materials, injecting the mixed materials into a mold, adding a supplementary material to the mold, cooling to form a product and releasing the product from the mold. Since the materials are divided in parts into inject into different areas of the mold, the multicolored three-dimensional candy manufactured by the method has different areas with different depths, contours, shapes and colors. The appearance of the candy can attract customers to buy it.
    Type: Application
    Filed: January 9, 2004
    Publication date: July 14, 2005
    Inventors: Cheng-Lung Huang, Cheng-Ching Huang, Chun-Hsien Wang
  • Publication number: 20030234338
    Abstract: A mold for making confections mainly includes a main body made of a flexible material and provided at one surface with a recess. The recess may show different shapes and is provided on an inner bottom surface with raised and depressed portions matching with the shape of the recess, dams lower than a top of the recess to divide the recess into several separated areas, and fine engraving ribs lower than the dams to show different curves or straight lines. Materials of different colors are separately poured into the separated areas in the recess to a level lower than the dams, and a binding stratum is formed between tops of the dams and the recess. After the materials and the binding stratum are set to form a molded confection, the main body is inverted and bent upward to separate the molded confection from the mold.
    Type: Application
    Filed: June 19, 2002
    Publication date: December 25, 2003
    Inventors: Cheng-Lung Huang, Cheng-Ching Huang, Chun-Hsien Wang