Patents by Inventor Chun-Hsiun Chen

Chun-Hsiun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110141086
    Abstract: An electrophoretic display with threshold voltage drift compensation functionality includes a gate driving circuit, a data driving circuit, a controller and a pixel array. The gate driving circuit provides plural gate signals according to a scan control signal. The data driving circuit provides plural data signals according to a data control signal. The controller is employed to provide the scan control signal and the data control signal. The pixel array is utilized for displaying images according to the gate signals and the data signals. Each of the gate signals includes a writing enable pulse for enabling write operations of the data signals during a writing period. And during a compensation period, each of the gate signals includes a compensation pulse for performing threshold voltage drift compensation operations on the data switches of the pixel array, and the data signals are set to hold a common voltage.
    Type: Application
    Filed: May 6, 2010
    Publication date: June 16, 2011
    Inventors: Chang-Yu Huang, Chuan-Sheng Wei, Pei-Ming Chen, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20110116157
    Abstract: An electrophoresis display panel including an active device array substrate and an electrophoresis display film is provided. The active device array substrate includes a plurality of active devices and a shielding pattern. The electrophoresis display film is disposed on the active device array substrate. The electrophoresis display film includes a conductive layer, a dielectric layer and a plurality of electrophoresis display mediums. The dielectric layer is disposed on the conductive layer and has a plurality of micro-cups arranged in area array. The dielectric layer is between the conductive layer and the active device array substrate. Light passing through the dielectric layer is prevented from irradiating onto the active devices by the shielding pattern. In addition, the electrophoresis display mediums are filled within the micro-cups, respectively.
    Type: Application
    Filed: February 3, 2010
    Publication date: May 19, 2011
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chuan-Sheng Wei, Sheng-Wen Huang, Pei-Ming Chen, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20110037729
    Abstract: A displaying region and a sensing region are defined in each pixel region of the OLED touch panel of the present invention. The readout thin film transistor of the sensing region is formed by the same processes with the drive thin film transistor of the displaying region. The top and bottom electrodes of the optical sensor are formed by the same processes with the top and bottom electrodes of the OLED. Accordingly, the present invention can just add a step of forming the patterned sensing dielectric layer to the processes of forming an OLED panel to integrate the optical sensor into the pixel region of the OLED panel. Thus, an OLED touch panel is formed.
    Type: Application
    Filed: March 4, 2010
    Publication date: February 17, 2011
    Inventors: An-Thung Cho, Jung-Yen Huang, Chia-Tien Peng, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20100327289
    Abstract: A UV sensor comprises a silicon-rich dielectric layer with a refractive index in a range of about 1.7 to about 2.5 for serving as the light sensing material of the UV sensor. The fabrication method of the UV sensor can be integrated with the fabrication process of semiconductor devices or flat display panels.
    Type: Application
    Filed: February 21, 2010
    Publication date: December 30, 2010
    Inventors: An-Thung Cho, Chi-Hua Sheng, Ruei-Liang Luo, Wan-Yi Liu, Wei-Min Sun, Chi-Mao Hung, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20100321341
    Abstract: The present invention provides a photo sensor, a method of forming the photo sensor, and a related optical touch device. The photo sensor includes a first electrode, a second electrode, a first silicon-rich dielectric layer and a second silicon-rich dielectric layer. The first silicon-rich dielectric layer is disposed between the first electrode and the second electrode for sensing infrared rays, and the second silicon-rich dielectric layer is disposed between the first silicon-rich dielectric layer and the second electrode for sensing visible light beams. The multi-layer structure including the first silicon-rich dielectric layer and the second silicon-rich dielectric layer enables the single photo sensor to effectively detect both infrared rays and visible light beams. Moreover, the single photo sensor is easily integrated into an optical touch device to form optical touch panel integrated on glass.
    Type: Application
    Filed: March 7, 2010
    Publication date: December 23, 2010
    Inventors: An-Thung Cho, Chia-Tien Peng, Hung-Wei Tseng, Cheng-Chiu Pai, Yu-Hsuan Li, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20100315580
    Abstract: A display panel having a pixel region and a sensing region includes a first substrate, a second substrate and a display medium layer. A plurality of pixel structures and at least one photo-voltaic cell device are disposed on the first substrate. The pixel structures are arranged in the pixel region in array, and each of the pixel structures includes a thin film transistor and a pixel electrode electrically connected to the thin film transistor. The photo-voltaic cell device disposed in the sensing region includes a doped semiconductor layer, a transparent electrode layer, a first type doped silicon-rich dielectric layer and a second type doped silicon-rich dielectric layer. The first type doped silicon-rich dielectric layer and the second type doped silicon-rich dielectric layer are disposed between the doped semiconductor layer and the transparent electrode layer. The display medium layer is disposed between the first substrate and the second substrate.
    Type: Application
    Filed: October 1, 2009
    Publication date: December 16, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventors: An-Thung Cho, Chia-Tien Peng, Wan-Yi Liu, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20100270551
    Abstract: A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other.
    Type: Application
    Filed: July 10, 2009
    Publication date: October 28, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Chuan-Sheng Wei, Guang-Ren Shen, Chang-Yu Huang, Pei-Ming Chen, Sheng-Chao Liu, Chun-Hsiun Chen, Wei-Ming Huang
  • Publication number: 20100163873
    Abstract: A photo-voltaic cell device includes a first electrode, an N-type doped silicon-rich dielectric layer, a P-type doped silicon-rich dielectric layer, and a second electrode. The N-type doped silicon-rich dielectric layer is disposed on the first electrode, and the N-type doped silicon-rich dielectric layer is doped with an N-type dopant. The P-type doped silicon-rich dielectric layer is disposed on the N-type doped silicon-rich dielectric layer, and the P-type doped silicon-rich dielectric layer is doped with a P-type dopant. The second electrode is disposed on the P-type doped silicon-rich dielectric layer. A display panel including the photo-voltaic cell device is also provided.
    Type: Application
    Filed: May 12, 2009
    Publication date: July 1, 2010
    Applicant: Au Optronics Corporation
    Inventors: An-Thung Cho, Chia-Tien Peng, Yu-Cheng Chen, Hong-Zhang Lin, Yi-Chien Wen, Wei-Min Sun, Chi-Mao Hung, Chun-Hsiun Chen
  • Publication number: 20100013001
    Abstract: A method for manufacturing a non-volatile memory and a structure thereof are provided. The manufacturing method comprises the following steps. Firstly, a substrate is provided. Next, a semiconductor layer is formed on the substrate. Then, a Si-rich dielectric layer is formed on the semiconductor layer. After that, a plurality of silicon nanocrystals is formed in the Si-rich dielectric layer by a laser annealing process to form a charge-storing dielectric layer. Last, a gate electrode is formed on the charge-storing dielectric layer.
    Type: Application
    Filed: July 10, 2009
    Publication date: January 21, 2010
    Applicant: AU OPTRONICS CORP.
    Inventors: An-Thung CHO, Chia-Tien PENG, Chih-Wei CHAO, Wan-Yi LIU, Chia-Kai CHEN, Chun-Hsiun CHEN, Wei-Ming HUANG
  • Patent number: 7211456
    Abstract: The present invention discloses a method for fabricating a pixel area of an electro-luminescent display device. At least one buffer layer is formed on a substrate. An etch stop layer is formed on the buffer layer. At least one intermediate layer is formed over the etch stop layer. The intermediate layer is etched to expose the etch stop layer, which has an etch rate substantially selective against that of the intermediate layer. The etch stop layer is etched to expose the buffer layer, which has an etch rate substantially selective against that of the etch stop layer, thereby improving an level uniformity of the exposed buffer layer.
    Type: Grant
    Filed: July 9, 2004
    Date of Patent: May 1, 2007
    Assignee: AU Optronics Corporation
    Inventors: Hsin-Hung Lee, Wei-Pang Huang, Chun-Hsiun Chen
  • Publication number: 20060008931
    Abstract: The present invention discloses a method for fabricating a pixel area of an electro-luminescent display device. At least one buffer layer is formed on a substrate. An etch stop layer is formed on the buffer layer. At least one intermediate layer is formed over the etch stop layer. The intermediate layer is etched to expose the etch stop layer, which has an etch rate substantially selective against that of the intermediate layer. The etch stop layer is etched to expose the buffer layer, which has an etch rate substantially selective against that of the etch stop layer, thereby improving an level uniformity of the exposed buffer layer.
    Type: Application
    Filed: July 9, 2004
    Publication date: January 12, 2006
    Inventors: Hsin-Hung Lee, Wei-Pang Huang, Chun-Hsiun Chen