Patents by Inventor Chun-Hsuan Kuo

Chun-Hsuan Kuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130259093
    Abstract: Various embodiments are disclosed for providing timing tracking loops in a communication system. A communication system includes a delay locked loop (DLL) comprising a maximum region detector configured to identify a target channel profile comprising at least a portion of the multipath signals based on the timing information, the maximum region detector further configured to apply a weight vector to each channel tap in the target channel profile and determine a tap with a maximum power level relative to remaining channel taps in the channel profile. The system further comprises a window timing loop (WTL) adjuster configured to track a position of a channel estimation window (CEW) within an observation window corresponding to the maximum channel energy level, where the maximum channel energy level corresponds to the sum of the energy of all the taps for a given window.
    Type: Application
    Filed: August 1, 2012
    Publication date: October 3, 2013
    Applicant: BROADCOM CORPORATION
    Inventor: Chun-Hsuan Kuo
  • Patent number: 8065593
    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder includes a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: November 22, 2011
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Chi-Ping Nee, Abraham Krieger, Shachar Kons, Chun-Hsuan Kuo
  • Publication number: 20100229070
    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder comprises a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.
    Type: Application
    Filed: May 17, 2010
    Publication date: September 9, 2010
    Inventors: Chi-Ping Nee, Abraham Krieger, Shachar Kons, Chun-Hsuan Kuo
  • Patent number: 7734984
    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder includes a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.
    Type: Grant
    Filed: November 10, 2006
    Date of Patent: June 8, 2010
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Chi-Ping Nee, Abraham Krieger, Shachar Kons, Chun-Hsuan Kuo
  • Publication number: 20070245208
    Abstract: An erasures assisted block code decoder and related method are provided. The erasures assisted block code decoder comprises a first block decoder, an erasures processor, and a second block code decoder. The first block decoder, for example, a Reed-Solomon decoder, is configured to decode blocks of data elements, e.g., bytes, that were previously affected by bursty errors. The first block decoder is also configured to identify those of such blocks it is unable to decode. The erasures processor is configured to identify, as erasures, data elements in the un-decodable blocks by utilizing, in the erasures identification process, data elements in the decoded blocks that were corrected by the first block decoder. The second block decoder, e.g., the same or different Reed-Solomon decoder, is configured to decode one or more of the un-decodable blocks by utilizing, in the decoding, the erasures identified by the erasures processor.
    Type: Application
    Filed: November 10, 2006
    Publication date: October 18, 2007
    Inventors: Chi-Ping Nee, Abraham Krieger, Shachar Kons, Chun-Hsuan Kuo