Patents by Inventor Chun-Hung Chang

Chun-Hung Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240142664
    Abstract: Two types of blue light blocking contact lenses are provided and are formed by curing different compositions. The first composition includes a blue light blocking component formed by mixing or reacting a first hydrophilic monomer and a yellow dye, a first colored dye component formed by mixing or reacting a second hydrophilic monomer and a first colored dye, at least one third hydrophilic monomer, a crosslinker, and an initiator. The first colored dye includes a green dye, a cyan dye, a blue dye, an orange dye, a red dye, a black dye, or combinations thereof. The second composition includes a blue light blocking component, at least one hydrophilic monomer, a crosslinker, and an initiator. The blue light blocking component is formed by mixing or reacting glycerol monomethacrylate and a yellow dye. Further, methods for preparing the above contact lenses are provided.
    Type: Application
    Filed: February 12, 2023
    Publication date: May 2, 2024
    Inventors: Han-Yi CHANG, Chun-Han CHEN, Tsung-Kao HSU, Wei-che WANG, Yu-Hung LIN, Wan-Ying GAO, Li-Hao LIU
  • Publication number: 20240136423
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 25, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240124844
    Abstract: The present disclosure provides a method for preparing a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors, the composition prepared by the method, and use of the composition for treating arthritis. The composition of the present disclosure achieves the effect of treating arthritis through various efficacy experiments.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Hsin Lee, Po-Cheng Lin, Yong-Cheng Kao, Ming-Hsi Chuang, Chun-Hung Chen, Chao-Liang Chang, Kai-Ling Zhang
  • Publication number: 20240127767
    Abstract: A display device and a projector are provided. The display device includes a pixel light-emitting panel and multiple color conversion panels. The pixel light-emitting panel includes an N1 number of light-emitting pixel units distributed in an array, and the light-emitting pixel units are driven to emit light through a driver. A first color conversion panel includes an N2 number of first color pixels and an N3 number of first transparent pixels. The first color pixels and the first transparent pixels are disposed relative to the light-emitting pixel units. A second color conversion panel includes an N4 number of second color pixels and an N5 number of second transparent pixels. The second color pixels and the second transparent pixels are disposed relative to the light-emitting pixel units. The lights generated by at least part of the light-emitting pixel units sequentially pass through the first color pixels and the second transparent pixels to achieve the color conversion.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 18, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Hui-Tang Shen, Wei-Hung Kuo, Kai-Ling Liang, Chun-I Wu, Yu-Hsiang Chang
  • Publication number: 20240128353
    Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
  • Publication number: 20240118806
    Abstract: Systems, devices, methods, and circuits for managing content addressable memory (CAM) devices. In one aspect, a semiconductor device includes: a memory cell array configured to store data in memory cells, and a circuitry coupled to the memory cell array and configured to execute a search operation in the memory cell array according to a search instruction. The search instruction includes at least one of search data or an option code, and the option code specifies, for the search operation, at least one of a search length or a search depth.
    Type: Application
    Filed: October 6, 2022
    Publication date: April 11, 2024
    Applicant: Macronix International Co., Ltd.
    Inventors: Chin-Hung Chang, Ken-Hui Chen, Chun-Hsiung Hung
  • Patent number: 11948722
    Abstract: A planar winding transformer includes a magnetic core set and a multilayer circuit board. The magnetic core set includes two magnetic cores and two magnetic columns. The two magnetic cores are parallel to each other. The multilayer circuit board is disposed between two magnetic cores, and two magnetic columns penetrate through the multilayer circuit board. The multilayer circuit board includes two low voltage winding layers and one high voltage winding layer. Two low voltage winding layers are connected to each other in parallel, and the high voltage winding layer is disposed between two low voltage winding layers. When the high voltage winding layer receives a polarity current, at least one of the low voltage winding layers generates a corresponding induced current. Two magnetic cores and two magnetic columns form a closed path for magnetic flux.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: April 2, 2024
    Assignees: CHICONY POWER TECHNOLOGY CO., LTD., NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY
    Inventors: Yen-Shin Lai, Yong-Yi Huang, Chun-Hung Lee, Hao-Chieh Chang
  • Publication number: 20240107901
    Abstract: Provided is a resistive random access memory (RRAM). The resistive random access memory includes a plurality of unit structures disposed on a substrate. Each of the unit structures includes a first electrode, and a first metal oxide layer. The first electrode is disposed on the substrate. The first metal oxide layer is disposed on the first electrode. In addition, the resistive random access memory includes a second electrode. The second electrode is disposed on the plurality of unit structures and connected to the plurality of unit structures.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Kai Jiun Chang, Chun-Hung Cheng, Chuan-Fu Wang
  • Publication number: 20240096781
    Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.
    Type: Application
    Filed: March 20, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
  • Publication number: 20240096873
    Abstract: Electrostatic discharge (ESD) structures are provided. An ESD structure includes a semiconductor substrate, a first epitaxy region with a first type of conductivity over the semiconductor substrate, a second epitaxy region with a second type of conductivity over the semiconductor substrate, and a plurality of semiconductor layers. The semiconductor layers are stacked over the semiconductor substrate and between the first and second epitaxy regions. A first conductive feature is formed over the first epitaxy region and outside an oxide diffusion region. A second conductive feature is formed over the second epitaxy region and outside the oxide diffusion region. A third conductive feature is formed over the first epitaxy region and within the oxide diffusion region. A fourth conductive feature is formed over the second epitaxy region and within the oxide diffusion region. The oxide diffusion region is disposed between the first and second conductive features.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Chun-Chia HSU, Tung-Heng HSIEH, Yung-Feng CHANG, Bao-Ru YOUNG, Jam-Wem LEE, Chih-Hung WANG
  • Patent number: 11914860
    Abstract: A processor receives, from an input device, input data for processing. Upon determining that the input data corresponds to an artificial intelligence (AI) application, the processor generates an AI command for performing read or write operations for a memory device that is configured to store data for a plurality of applications including the AI application, the AI command characterized by an operational code and including information about one or more components of the AI application corresponding to the input data. The processor sends the AI command and the input data to a storage controller managing the memory device, wherein the read or write operations for the memory device are performed by the storage controller using the operational code and the information included in the AI command. The processor receives, from the storage controller, a result of the read or write operations performed on the memory device.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: February 27, 2024
    Assignee: Macronix International Co., Ltd.
    Inventors: Chun-Hung Lai, Hung-Sheng Chang
  • Publication number: 20230341744
    Abstract: Systems and methods are disclosed for generating cluster quantum states usable for quantum computing. An example system can generate a plurality of qumodes. The plurality of qumodes can include at least two successive qumodes in frequency domain, wherein a frequency spacing between two successive qumodes is equal to a free-spectral range of an optical frequency comb. The plurality of qumodes can include a plurality of bipartite entangled states. A cluster quantum state can be generated by modulating a phase of a portion of the optical fields associated with the plurality of qumodes received from the optical frequency comb, at one or more modulation frequencies. In some embodiments, each of the one or more modulation frequencies can be equal to an integral multiple of the free-spectral-range. In certain embodiments, a property of a cluster graph (such as a dimension of the cluster graph) associated with the cluster quantum state can be controlled by adjusting one or more modulation frequencies.
    Type: Application
    Filed: September 8, 2021
    Publication date: October 26, 2023
    Applicants: University of Virginia Patent Foundation, Bar-Ilan University
    Inventors: Olivier Pfister, Carlos Gonzalez-Arciniegas, Xuan Zhu, Chun-Hung Chang, Avi Pe'er
  • Patent number: 11363371
    Abstract: An electronic device includes a main body, a sound guiding tube, a microphone assembly and an adjustment cavity. The device body includes a wall plate. The sound guiding tube is formed on the wall plate of the main body and includes an input end, a first output end and a second output end, and the input end is in communication with the external environment. The microphone assembly is arranged on the main body and in communication with the first output end of the sound guiding tube, and the microphone assembly is acoustically connected to the external environment. The adjustment cavity is arranged in the main body and in communication with the second output end of the sound guiding tube, and the adjustment cavity is acoustically connected to the external environment.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: June 14, 2022
    Assignee: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Hung-Wei Chen, Chun-Hung Chang, Shiang-Chun Hsu, Jin-Huang Huang, Yu-Cheng Liu
  • Publication number: 20220167080
    Abstract: An electronic device includes a main body, a sound guiding tube, a microphone assembly and an adjustment cavity. The device body includes a wall plate. The sound guiding tube is formed on the wall plate of the main body and includes an input end, a first output end and a second output end, and the input end is in communication with the external environment. The microphone assembly is arranged on the main body and in communication with the first output end of the sound guiding tube, and the microphone assembly is acoustically connected to the external environment. The adjustment cavity is arranged in the main body and in communication with the second output end of the sound guiding tube, and the adjustment cavity is acoustically connected to the external environment.
    Type: Application
    Filed: February 1, 2021
    Publication date: May 26, 2022
    Applicant: Merry Electronics(Shenzhen) Co., Ltd.
    Inventors: Hung-Wei Chen, Chun-Hung Chang, Shiang-Chun Hsu, Jin-Huang Huang, Yu-Cheng Liu
  • Patent number: 9657757
    Abstract: Some embodiments of the present disclosure provide a method of dissipating process exhaust from a chamber. The method includes conveying the process exhaust from the chamber through an inner tube of a pipeline to abatement. The process exhaust has a first temperature while exiting the chamber, and a second temperature while exiting the pipeline. The method maintains an outer tube of the pipeline at a vacuum state by a pump such that the inner tube is substantially thermal isolated from the atmosphere outside the pipeline. The second temperature is negative offset from the first temperature within a predetermined value.
    Type: Grant
    Filed: March 16, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tung-Lin Yang, Chun-Hung Chang, Rouh Jier Wang
  • Publication number: 20160273541
    Abstract: Some embodiments of the present disclosure provide a method of dissipating process exhaust from a chamber. The method includes conveying the process exhaust from the chamber through an inner tube of a pipeline to abatement. The process exhaust has a first temperature while exiting the chamber, and a second temperature while exiting the pipeline. The method maintains an outer tube of the pipeline at a vacuum state by a pump such that the inner tube is substantially thermal isolated from the atmosphere outside the pipeline. The second temperature is negative offset from the first temperature within a predetermined value.
    Type: Application
    Filed: March 16, 2015
    Publication date: September 22, 2016
    Inventors: TUNG-LIN YANG, CHUN-HUNG CHANG, ROUH JIER WANG
  • Patent number: 8283905
    Abstract: A voltage converter for converting an input voltage into an output voltage, wherein the output voltage is output to a load, is provided. An inductor is coupled between an output terminal and a node. A transistor is coupled between an input terminal and the node. A pulse width modulation (PWM) controller generates a first control signal according to the output voltage and a first reference voltage. An amplifier generates a second control signal according to the output voltage and a second reference voltage. A detector detects a loading of the load to generate a switching signal. A switching circuit selectively couples one of the PWM controller and the amplifier to the transistor according to the switching signal. The switching circuit controls the transistor according to the second control signal when the amplifier is coupled to the transistor, such that the transistor is operated in a saturation region.
    Type: Grant
    Filed: December 1, 2009
    Date of Patent: October 9, 2012
    Assignee: uPI Semiconductor Corporation
    Inventors: Chun-Hung Chang, Te-Hsien Liu, Jiun-Chiang Chen
  • Publication number: 20110127977
    Abstract: A voltage converter for converting an input voltage into an output voltage, wherein the output voltage is output to a load, is provided. An inductor is coupled between an output terminal and a node. A transistor is coupled between an input terminal and the node. A pulse width modulation (PWM) controller generates a first control signal according to the output voltage and a first reference voltage. An amplifier generates a second control signal according to the output voltage and a second reference voltage. A detector detects a loading of the load to generate a switching signal. A switching circuit selectively couples one of the PWM controller and the amplifier to the transistor according to the switching signal. The switching circuit controls the transistor according to the second control signal when the amplifier is coupled to the transistor, such that the transistor is operated in a saturation region.
    Type: Application
    Filed: December 1, 2009
    Publication date: June 2, 2011
    Applicant: UPI SEMICONDUCTOR CORPORATION
    Inventors: Chun-Hung Chang, Te-Hsien Liu, Jiun-Chiang Chen
  • Patent number: 7265614
    Abstract: In an amplifier circuit with reduced power-off transients, an amplifier is provided for receiving an input signal and a reference signal to generate an output signal therefrom when it is enabled, and the amplifier is disabled when the supply voltage to the amplifier drops down to a threshold or to a level higher than the reference signal a threshold. The output stage transistor of the amplifier is applied with a body voltage to suppress the body diode parasitic to the output stage transistor to be forward-biased.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: September 4, 2007
    Assignee: Analog and Power Electronics Corp.
    Inventors: Chun-Hung Chang, Fu-Yuan Chen, Shu-Hua Wang
  • Patent number: D1021220
    Type: Grant
    Filed: July 15, 2021
    Date of Patent: April 2, 2024
    Assignee: Radiant Opto-Electronics Corporation
    Inventors: Cheng-Ang Chang, Guo-Hao Huang, Chun-Yi Sun, Chih-Hung Ju, Pin-Tsung Wang