Abstract: An embodiment is a semiconductor structure. The semiconductor structure comprises an epitaxial region, a gate structure, a contact spacer, and an etch stop layer. The epitaxial region is in a substrate. A top surface of the epitaxial region is elevated from a top surface of the substrate, and the epitaxial region has a facet between the top surface of the substrate and the top surface of the epitaxial region. The gate structure is on the substrate. The contact spacer is laterally between the facet of the epitaxial region and the gate structure. The etch stop layer is over and adjoins each of the contact spacer and the top surface of the epitaxial region. A ratio of an etch selectivity of the contact spacer to an etch selectivity of the etch stop layer is equal to or less than 3:1.

Abstract: An embodiment is a semiconductor structure. The semiconductor structure comprises at least two gate structures on a substrate. The gate structures define a recess between the gate structures, and the recess is defined by a depth in a vertical direction. The depth is from a top surface of at least one of the gate structures to below a top surface of the substrate, and the depth extends in an isolation region in the substrate. The semiconductor structure further comprises a filler material in the recess. The filler material has a first thickness in the vertical direction. The semiconductor structure also comprises an inter-layer dielectric layer in the recess and over the filler material. The inter-layer dielectric layer has a second thickness in the vertical direction below the top surface of the at least one of the gate structures. The first thickness is greater than the second thickness.

Abstract: An embodiment is a semiconductor structure. The semiconductor structure comprises at least two gate structures on a substrate. The gate structures define a recess between the gate structures, and the recess is defined by a depth in a vertical direction. The depth is from a top surface of at least one of the gate structures to below a top surface of the substrate, and the depth extends in an isolation region in the substrate. The semiconductor structure further comprises a filler material in the recess. The filler material has a first thickness in the vertical direction. The semiconductor structure also comprises an inter-layer dielectric layer in the recess and over the filler material. The inter-layer dielectric layer has a second thickness in the vertical direction below the top surface of the at least one of the gate structures. The first thickness is greater than the second thickness.

Abstract: Methods of fabricating a semiconductor device including a metal gate transistor and a resistor are provided. A method includes providing a substrate including a transistor device region and an isolation region, forming a dummy gate over the transistor device region and a resistor over the isolation region, and implanting the resistor with a dopant. The method further includes wet etching the dummy gate to remove the dummy gate, and then forming a metal gate over the transistor device region to replace the dummy gate.

Abstract: An embodiment is a semiconductor structure. The semiconductor structure comprises at least two gate structures on a substrate. The gate structures define a recess between the gate structures, and the recess is defined by a depth in a vertical direction. The depth is from a top surface of at least one of the gate structures to below a top surface of the substrate, and the depth extends in an isolation region in the substrate. The semiconductor structure further comprises a filler material in the recess. The filler material has a first thickness in the vertical direction. The semiconductor structure also comprises an inter-layer dielectric layer in the recess and over the filler material. The inter-layer dielectric layer has a second thickness in the vertical direction below the top surface of the at least one of the gate structures. The first thickness is greater than the second thickness.

Abstract: Methods of fabricating a semiconductor device including a metal gate transistor and a resistor are provided. A method includes providing a substrate including a transistor device region and an isolation region, forming a dummy gate over the transistor device region and a resistor over the isolation region, and implanting the resistor with a dopant. The method further includes wet etching the dummy gate to remove the dummy gate, and then forming a metal gate over the transistor device region to replace the dummy gate.

Abstract: An embodiment is a semiconductor structure. The semiconductor structure comprises an epitaxial region, a gate structure, a contact spacer, and an etch stop layer. The epitaxial region is in a substrate. A top surface of the epitaxial region is elevated from a top surface of the substrate, and the epitaxial region has a facet between the top surface of the substrate and the top surface of the epitaxial region. The gate structure is on the substrate. The contact spacer is laterally between the facet of the epitaxial region and the gate structure. The etch stop layer is over and adjoins each of the contact spacer and the top surface of the epitaxial region. A ratio of an etch selectivity of the contact spacer to an etch selectivity of the etch stop layer is equal to or less than 3:1.

Abstract: An embodiment is a semiconductor structure. The semiconductor structure comprises at least two gate structures on a substrate. The gate structures define a recess between the gate structures, and the recess is defined by a depth in a vertical direction. The depth is from a top surface of at least one of the gate structures to below a top surface of the substrate, and the depth extends in an isolation region in the substrate. The semiconductor structure further comprises a filler material in the recess. The filler material has a first thickness in the vertical direction. The semiconductor structure also comprises an inter-layer dielectric layer in the recess and over the filler material. The inter-layer dielectric layer has a second thickness in the vertical direction below the top surface of the at least one of the gate structures. The first thickness is greater than the second thickness.

Abstract: A method for designing a grating comprises steps of (a1) generating a first diffraction spectrum based on calculation values of a plurality of structural parameters, (a2) calculating a first difference value between the first diffraction spectrum and a first nominal spectrum, (a3) setting a default difference value with the first difference value and default structural parameter values with the structural parameter values, (b1) changing one of the structural parameter values to generate a second diffraction spectrum, (b2) calculating a second difference value between the second diffraction spectrum and a second nominal spectrum, and (c) comparing the default difference value and the second difference value, updating a default difference value with the smaller one, and updating the default structural parameter values with the structural parameter values corresponding to the smaller one.

Abstract: A method for improving the measurement capability of multi-parameter inspection systems includes performing a measuring procedure to acquire a measured signature of a sample, calculating weighting factors representing a correlation between structural parameters of the sample by using a weighting algorithm, transforming the weighting factors into a sampling function by using a transforming rule, updating the measured signature to form an updated measured signature and generating a plurality of updated nominal signatures according to the sampling function, and comparing the updated measured signature and the updated nominal signatures to determine the structural parameters of the sample.

Abstract: A system and method for efficiently and accurately determining grating profiles uses characteristic signature matching in a discrepancy enhanced library generation process. Using light scattering theory, a series of scattering signatures vs. scattering angles or wavelengths are generated based on the designed grating parameters, for example. CD, thickness and Line:Space ratio. This method selects characteristic portions of the signatures wherever their discrepancy exceeds the preset criteria and reforms a characteristic signature library for quick and accurate matching. A rigorous coupled wave theory can be used to generate a diffraction library including a plurality of simulated diffraction spectrums based on a predetermined structural parameter of the grating. The characteristic region of the plurality of simulated diffraction spectrums is determined based on if the root mean square error of the plurality of simulated diffraction spectrums is larger than a noise level of a measuring machine.

Abstract: A method for improving the measurement capability of multi-parameter inspection systems includes performing a measuring procedure to acquire a measured signature of a sample, calculating weighting factors representing a correlation between structural parameters of the sample by using a weighting algorithm, transforming the weighting factors into a sampling function by using a transforming rule, updating the measured signature to form an updated measured signature and generating a plurality of updated nominal signatures according to the sampling function, and comparing the updated measured signature and the updated nominal signatures to determine the structural parameters of the sample.

Abstract: A method for inspecting a grating biochip comprises the steps of irradiating a grating biochip using a light beam, measuring a diffracted light using a photodetector, selecting a plurality of parameters of the grating biochip, and optimizing the parameters to enhance the detection sensitivity, wherein the diffracted light is generated by the light beam passing the grating biochip. The grating biochip comprises a grating structure including a semiconductor substrate, a grating positioned on the semiconductor substrate and a dielectric layer covering the grating and the semiconductor substrate. The sample of the biochip is positioned on the grating structure.

Abstract: A method for designing a grating comprises steps of (a1) generating a first diffraction spectrum based on calculation values of a plurality of structural parameters, (a2) calculating a first difference value between the first diffraction spectrum and a first nominal spectrum, (a3) setting a default difference value with the first difference value and default structural parameter values with the structural parameter values, (b1) changing one of the structural parameter values to generate a second diffraction spectrum, (b2) calculating a second difference value between the second diffraction spectrum and a second nominal spectrum, and (c) comparing the default difference value and the second difference value, updating a default difference value with the smaller one, and updating the default structural parameter values with the structural parameter values corresponding to the smaller one.

Abstract: A method for inspecting a grating biochip comprises the steps of irradiating a grating biochip using a light beam, measuring a diffracted light using a photodetector, selecting a plurality of parameters of the grating biochip, and optimizing the parameters to enhance the detection sensitivity, wherein the diffracted light is generated by the light beam passing the grating biochip. The grating biochip comprises a grating structure including a semiconductor substrate, a grating positioned on the semiconductor substrate and a dielectric layer covering the grating and the semiconductor substrate. The sample of the biochip is positioned on the grating structure.

Abstract: A system and method for efficiently and accurately determining grating profiles uses characteristic signature matching in a discrepancy enhanced library generation process. Using light scattering theory, a series of scattering signatures vs. scattering angles or wavelengths are generated based on the designed grating parameters, for example. CD, thickness and Line:Space ratio. This method selects characteristic portions of the signatures wherever their discrepancy exceeds the preset criteria and reforms a characteristic signature library for quick and accurate matching. A rigorous coupled wave theory can be used to generate a diffraction library including a plurality of simulated diffraction spectrums based on a predetermined structural parameter of the grating. The characteristic region of the plurality of simulated diffraction spectrums is determined based on if the root mean square error of the plurality of simulated diffraction spectrums is larger than a noise level of a measuring machine.

Abstract: Precision in scatterometry measurements is improved by designing the reticle, or the target grating formed by the reticle, for greater overlay measurement sensitivity. Parameters of the structure and material of the substrate are first determined. These parameters may include the material composition, thickness, and sidewall angles of the sample substrate. The target grating is then designed so that the overlay measurement, on the sample substrate, is made more sensitive. A suitable measurement wavelength is selected, optionally via computer simulation, to further improve the sensitivity. This method increases the change of reflective signatures with overlay offsets, and thus improves the sensitivity of overlay measurement.

Abstract: A microscopic imaging apparatus with flat-top distribution of light is disclosed, which includes an incident light source, a diffractive optical element, a beam-splitter, a tunable filter and an image sensor. The diffractive optical element receives an incident light provided by the incident light source and generates a uniform incident light. The uniform incident light illuminates a sample so that an optical signal is emitted from the sample. The optical signal passes through the beam-splitter and the filter unit to reach the image sensor for obtaining the detected image of the sample.

Abstract: A apparatus for generating a structured line having a sinusoidal intensity distribution is disclosed. The apparatus comprises a coherent light source and a diffractive optical element. The coherent light source provides an incident light beam to the diffractive optical element, the incident light beam being modulated by means of the diffractive optical element to form a fringe pattern of sinusoidal intensity distribution. The diffractive optical element design is optimized in accordance with the optical field distribution of an incident-light-beam plane and the optical field distribution of an output-light-beam plane.

Abstract: A microscopic imaging apparatus with flat-top distribution of light is disclosed, which includes an incident light source, a diffractive optical element, a beam-splitter, a tunable filter and an image sensor. The diffractive optical element receives an incident light provided by the incident light source and generates a uniform incident light. The uniform incident light illuminates a sample so that an optical signal is emitted from the sample. The optical signal passes through the beam-splitter and the filter unit to reach the image sensor for obtaining the detected image of the sample.