Abstract: A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop.

Abstract: A method for compressing an initial weight matrix includes generating a first weight matrix and a second weight matrix according to the initial weight matrix where the initial weight matrix is a Kronecker product of a transposed matrix of the second weight matrix and the first weight matrix; optimizing the first and second weight matrixes to generate an optimized first weight matrix and an optimized second weight matrix; generating a processed data matrix according to an initial data matrix where the initial data matrix is vectorization of the processed data matrix; multiplying the processed data matrix by the optimized first weight matrix to generate a first product; multiplying the optimized second weight matrix by the first product to generate a second product; and vectorizing the second product. The initial weight matrix requires a larger memory space than a combined memory space of the first and second weight matrixes.

Abstract: Systems and methods are provided for thermally managing a computer component which is untethered to a management controller. An exemplary method can comprise obtaining monitoring information for one or more untethered, thermally sensitive components of the computing device. The monitoring information can comprise temperature. The method can then provide for transmitting, via an OS, the monitoring information to the management controller via a system interface of the management controller. The method finally provides for adjusting, via the management controller, operation of at least one thermal management component which is tethered to the management controller.

Abstract: A method of thermal management in a computing device using a management controller is provided. The method includes obtaining, via a virtual management controller, monitoring information of a thermally sensitive component untethered to the management controller. The monitoring information can include temperature information of the thermally sensitive component. The method also includes transmitting, via the virtual management controller, the monitoring information to the management controller via a system interface of the management controller. Finally, the method includes adjusting, via the management controller, operation of a thermal management component of the computing device tethered to the management controller.

Abstract: The present disclosure provides a system and method for retrieving temperature information of GPUs of a server system via PCIe topology, and using a baseboard management controller (BMC) to control fan speed(s) of cooling fans based at least upon the temperatures of the GPUs. In some implementations, the management controller can determine a PCIe topology of the server system via an operating system (OS), and get the BusID of each GPU or GPU card of the server system. Based upon the BusID, the management controller can retrieve temperature information of a corresponding GPU from a GPU library (e.g., NVIDIA Management Library [NVML]), and further control fan speed of cooling fan(s) based at least upon the temperature information.

Abstract: A method for compressing an initial weight matrix includes generating a first weight matrix and a second weight matrix according to the initial weight matrix where the initial weight matrix is a Kronecker product of a transposed matrix of the second weight matrix and the first weight matrix; optimizing the first and second weight matrixes to generate an optimized first weight matrix and an optimized second weight matrix; generating a processed data matrix according to an initial data matrix where the initial data matrix is vectorization of the processed data matrix; multiplying the processed data matrix by the optimized first weight matrix to generate a first product; multiplying the optimized second weight matrix by the first product to generate a second product; and vectorizing the second product. The initial weight matrix requires a larger memory space than a combined memory space of the first and second weight matrixes.

Abstract: An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

Abstract: A gesture recognition system includes a Frequency modulated continuous waveform radar system. First and second channels of the signal reflected by the object are preprocessed and respectively sent to first and second feature map generators. A machine-learning accelerator is configured to receive output from the first and second feature map generators and form frames fed to a deep neural network realized with a hardware processor array for gesture recognition. A memory stores a compressed set of weights as fixed-point, low rank matrices that are directly treated as weights of the deep neural network during inference.

Abstract: A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.

Abstract: A method for enhancing linearity of the receiver front-end system includes receiving a radio frequency signal by an antenna, converting the radio frequency signal to first differential signals by a transformer module, adjusting frequencies of the first differential signals to generate second differential signals by a mixer module, detecting a common signal in order to reduce a common error of the second differential signals, and generating third differential signals according to a reference signal after the common error is reduced from the second differential signals. The first differential signals, the second differential signals, and the third differential signals are unbalanced.

Abstract: An oscillating circuit has an injection-locked oscillator (ILO) and a calibration circuit. The ILO has a Gm cell and an LC tank. A first node of the Gm cell receives a first injection signal, and a second node of the Gm cell receives a second injection signal. The first injection signal and the second injection signal are differential signals. The Gm cell provides a negative resistance between a first output end and a second output end of the Gm cell. When the calibration circuit tunes a resonant frequency of the LC tank of the ILO, the magnitude of the negative resistance is reduced to control the ILO to stop self-oscillating. After finishing tuning the resonant frequency of the LC tank, the calibration circuit controls the ILO to start self-oscillating by increasing the magnitude of the negative resistance.

Abstract: A divider-less phase locked loop (PLL) includes a phase frequency detector (PFD), a charge pump (CP), a voltage controlled oscillator (VCO), a delay unit, and a clock gating unit. The PFD is electrically connected to the VCO through the CP, and the CP outputs a voltage control signal to the VCO. The VCO generates an output signal. The delay unit receives and delays a reference signal to generate a delay signal. The clock gating unit samples the output signal according to the delay signal. Since the clock gating unit samples the output signal according to the delay signal, the divider-less PLL does not need to include a divider to divide a frequency of the output signal. Therefore, power consumption of the divider-less PLL can be reduced.

Abstract: A low voltage inverter-based amplifier includes a first inverter-based amplification module, a second inverter-based amplification module, an inverter-based feedforward module, and an inverter-based common mode detector. The first inverter-based amplification module receives an input signal. The second inverter-based amplification module receives the input signal through the inverter-based feedforward module, and receives a first output signal from the first inverter-based amplification module. The inverter-based common mode detector receives an amplified signal from the second inverter-based amplification module, and outputs a feedback signal to the second inverter-based amplification module. Since the first and the second inverter-based amplification modules are both inverter-based, the supply voltage of the low voltage inverter-based amplifier is provided to supply one PMOS and one NMOS for normal operation.

Abstract: A frequency-modulated continuous-wave radar system includes a waveform generator, a delta-sigma modulation circuit, a voltage controlled oscillator, a frequency divider circuit, a control circuit, an injection locked oscillator, a power amplifier circuit, a first power detection circuit, a second power detection circuit, a third power detection circuit, and a calibration engine circuit. The waveform generator, the delta-sigma modulation circuit, the voltage controlled oscillator, the frequency divider circuit, and the control circuit form a phase locked loop.

Abstract: A divider-less phase locked loop (PLL) includes a phase frequency detector (PFD), a charge pump (CP), a voltage controlled oscillator (VCO), a delay unit, and a clock gating unit. The PFD is electrically connected to the VCO through the CP, and the CP outputs a voltage control signal to the VCO. The VCO generates an output signal. The delay unit receives and delays a reference signal to generate a delay signal. The clock gating unit samples the output signal according to the delay signal. Since the clock gating unit samples the output signal according to the delay signal, the divider-less PLL does not need to include a divider to divide a frequency of the output signal. Therefore, power consumption of the divider-less PLL can be reduced.

Abstract: A performing device of a gesture recognition system executes a performing procedure of a gesture recognition method. The performing procedure includes steps of: receiving a sensing signal; selecting one of sensing frames of the sensing signal; determining a soft label of the selected sensing frame; classifying a gesture event when the soft label of the selected sensing frame is approved. The gesture event is classified to determine the motion of the user. Therefore, the gesture recognition system does not need a predetermined time period to recognize the motion of the user. The time period for recognizing the motion of the user can be dynamical. A total time period for classifying a plurality of motions can be decreased, and the performance of the gesture recognition system can be improved.

Abstract: A gesture recognition system includes a transmission unit, a first reception chain, a second reception chain, a customized gesture collection engine and a machine learning accelerator. The transmission unit is used to transmit a transmission signal to detect a gesture. The first reception chain is used to receive a first signal and generate first feature map data corresponding to the first signal. The second reception chain is used to receive a second signal and generate second feature map data corresponding to the second signal. The first signal and the second signal are generated by the gesture reflecting the transmission signal. The customized gesture collection engine is used to generate gesture data according to at least the first feature map data and the second feature map data. The machine learning accelerator is used to perform machine learning with the gesture data.