Patents by Inventor Chun-Hung Yeh

Chun-Hung Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11932095
    Abstract: Provided is a buckle locking device for the tonneau cover of pick-up trucks (II), which mainly comprises a load-bearing cross bar, a slider, a handle, a buckle block, a slide fixing block, a T-bar and an extruded aluminum frame, characterized in that: when the load-bearing cross bar and the slider is pressed by the handle of the buckle locking mechanism for buckling, it can generate a downward pulling force, which can be transmitted by the load-bearing cross bar to force the whole tonneau cover frame to generate a downward pressure, so that it can cover the truck bed tightly. Moreover, through the design of the slider mechanism, the T-bar can offer better stability and better positioning. When the buckle locking mechanism is not used, it can also be hidden inside the groove of the slider.
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: March 19, 2024
    Inventors: Gai-Lee Shen, Chun-Hung Yeh
  • Patent number: 11908781
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor package structure. The semiconductor package structure includes a substrate with a first surface, an encapsulant, an electronic component, and a patterned conductive layer. The encapsulant is disposed on the first surface of the substrate. The encapsulant includes a first surface and a second surface. The patterned conductive layer extends on the first surface and the second surface of the encapsulant and protrudes from the first surface and the second surface of the encapsulant. The electronic component is disposed on the patterned conductive layer.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: February 20, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Chih Cho, Chun-Hung Yeh, Tsung-Wei Lu
  • Publication number: 20230396000
    Abstract: A cable assembly and a cable connection component are provided. The cable assembly includes a cable and a cable connection component. The cable connection component includes a first outer metal member, a second outer metal member and a holding component. The second outer metal member has an end for interlocking with an end of the first outer metal member. The holding component is disposed between the first outer metal member and the second outer metal member. The holding component includes two inner metal members that are fixed to each other by a fixing member. Each inner metal member includes a wire slot, the wire slot includes an end section and two branch sections, the two end sections jointly hold a portion of the cable in place, and each branch section of the two inner metal members jointly hold one of core wires of the cable in place.
    Type: Application
    Filed: October 24, 2022
    Publication date: December 7, 2023
    Inventors: CHUN-HUNG YEH, CHIH-YUNG CHEN, PEI-JU LI
  • Publication number: 20230216174
    Abstract: An electronic package and a method of manufacturing an electronic package are provided. The electronic package includes a carrier, an antenna substrate, and an electronic component. The carrier has a first surface and a second surface. The antenna substrate includes a resonant cavity and is disposed over the first surface. The antenna substrate is closer to the first surface than the second surface of the carrier. The electronic component is disposed between the antenna substrate and the second surface of the carrier.
    Type: Application
    Filed: December 30, 2021
    Publication date: July 6, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Chung Ju YU, Shao-Lun YANG, Chun-Hung YEH, Hong Jie CHEN, Tsung-Wei LU, Wei Shuen KAO
  • Publication number: 20220301995
    Abstract: At least some embodiments of the present disclosure relate to a semiconductor package structure. The semiconductor package structure includes a substrate with a first surface, an encapsulant, an electronic component, and a patterned conductive layer. The encapsulant is disposed on the first surface of the substrate. The encapsulant includes a first surface and a second surface. The patterned conductive layer extends on the first surface and the second surface of the encapsulant and protrudes from the first surface and the second surface of the encapsulant. The electronic component is disposed on the patterned conductive layer.
    Type: Application
    Filed: March 22, 2021
    Publication date: September 22, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Chih CHO, Chun-Hung YEH, Tsung-Wei LU
  • Publication number: 20220246533
    Abstract: The present disclosure provides a semiconductor device package and a method of manufacturing the same. The semiconductor device package includes a substrate, an interconnection structure, a package body, and a first electronic component. The interconnection structure is disposed on the substrate. The package body is disposed on the substrate and partially covers the interconnection structure. The package body has a position limiting structure around the interconnection structure. The first electronic component is disposed on the interconnection structure and electrically connected to the interconnection structure.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Chih CHO, Shao-Lun Yang, Chun-Hung YEH, Tsung-Wei LU
  • Patent number: D922627
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: June 15, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D922628
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: June 15, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D922629
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: June 15, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D929625
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: August 31, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D929626
    Type: Grant
    Filed: March 11, 2021
    Date of Patent: August 31, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D934468
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: October 26, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D934471
    Type: Grant
    Filed: January 4, 2021
    Date of Patent: October 26, 2021
    Inventor: Chun-Hung Yeh
  • Patent number: D946794
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: March 22, 2022
    Inventor: Chun-Hung Yeh
  • Patent number: D964903
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 27, 2022
    Inventor: Chun-Hung Yeh
  • Patent number: D965488
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: October 4, 2022
    Inventor: Chun-Hung Yeh
  • Patent number: D967744
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: October 25, 2022
    Inventor: Chun-Hung Yeh
  • Patent number: D968290
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: November 1, 2022
    Inventor: Chun-Hung Yeh
  • Patent number: D998194
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: September 5, 2023
    Inventor: Chun-Hung Yeh