Patents by Inventor Chun-I Hsieh

Chun-I Hsieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8936991
    Abstract: Methods of forming a capacitor including forming a titanium nitride material within at least one aperture defined by a support material, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The titanium nitride material may be oxidized to a titanium dioxide material. A second conductive material may be formed over a surface of the titanium dioxide material. A semiconductor device may include at least one capacitor, wherein a major longitudinal portion of the at least one capacitor is not surrounded by a solid material. The capacitor may include a first electrode; a ruthenium oxide material laterally adjacent the first electrode; a rutile titanium dioxide material laterally adjacent the ruthenium oxide material; and a second electrode laterally adjacent the rutile titanium dioxide material.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: January 20, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chun-I Hsieh, Chris Carlson
  • Patent number: 8921977
    Abstract: A capacitor array includes a plurality of capacitors and a support frame. Each capacitor includes an electrode. The support frame supports the plurality of electrodes and includes a plurality of support structures corresponding to the plurality of electrodes. Each support structure may surround the respective electrode. The support frame may include oxide of a doped oxidizable material.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: December 30, 2014
    Assignee: Nan Ya Technology Corporation
    Inventors: Jen Jui Huang, Che Chi Lee, Shih Shu Tsai, Cheng Shun Chen, Shao Ta Hsu, Chao Wen Lay, Chun I Hsieh, Ching Kai Lin
  • Patent number: 8916392
    Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
    Type: Grant
    Filed: May 27, 2013
    Date of Patent: December 23, 2014
    Assignee: Nanya Technology Corp.
    Inventors: Chun-I Hsieh, Chang-Rong Wu
  • Patent number: 8901527
    Abstract: An RRAM includes a resistive layer including a dielectric layer and surplus oxygen ions or nitrogen ions from a treatment on the dielectric layer after the dielectric layer is formed. When the RRAM is applied with a voltage, the oxygen ions or nitrogen ions occupy vacancies in the dielectric layer to increase resistance of the resistive layer. When the RRAM is applied with another voltage, the oxygen ions or nitrogen ions are removed from the vacancies to lower the resistance of the resistive layer.
    Type: Grant
    Filed: July 2, 2010
    Date of Patent: December 2, 2014
    Assignee: Nanya Technology Corp.
    Inventors: Chun-I Hsieh, Chang-Rong Wu, Neng-Tai Shih
  • Publication number: 20140315368
    Abstract: A process of forming a capacitor structure includes providing a substrate. Next, a first electrode is deposited onto the substrate. Later, a water-based ALD process is performed to deposit a transitional amorphous TiO2 layer on the first electrode. Subsequently, the transitional amorphous TiO2 layer is treated by oxygen plasma to transform the entire transitional amorphous TiO2 layer into a rutile TiO2 layer. Finally, a second electrode is deposited on the rutile TiO2 layer.
    Type: Application
    Filed: June 30, 2014
    Publication date: October 23, 2014
    Inventors: Chun-I Hsieh, Daniel Damjanovic
  • Publication number: 20140210049
    Abstract: Methods of forming a capacitor including forming a titanium nitride material within at least one aperture defined by a support material, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The titanium nitride material may be oxidized to a titanium dioxide material. A second conductive material may be formed over a surface of the titanium dioxide material. A semiconductor device may include at least one capacitor, wherein a major longitudinal portion of the at least one capacitor is not surrounded by a solid material. The capacitor may include a first electrode; a ruthenium oxide material laterally adjacent the first electrode; a rutile titanium dioxide material laterally adjacent the ruthenium oxide material; and a second electrode laterally adjacent the rutile titanium dioxide material.
    Type: Application
    Filed: April 3, 2014
    Publication date: July 31, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chun-I Hsieh, Chris Carlson
  • Publication number: 20140185182
    Abstract: A capacitor structure includes a first electrode on a substrate; a TiO2 dielectric layer directly on the first electrode, wherein the TiO2 dielectric layer has substantially only rutile phase; and a second electrode on the TiO2 dielectric layer. Template layer, seed layer or pretreated layer is not required between the first electrode and the TiO2 dielectric layer. Besides, impurity doping is not required for the TiO2 dielectric layer.
    Type: Application
    Filed: January 2, 2013
    Publication date: July 3, 2014
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Chun-I Hsieh, Daniel Damjanovic
  • Patent number: 8748283
    Abstract: Methods of forming a capacitor including forming at least one aperture in a support material, forming a titanium nitride material within the at least one aperture, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The support material may then be removed and the titanium nitride material may be oxidized to form a titanium dioxide material. A second conductive material may then be formed over an outer surface of the titanium dioxide material.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: June 10, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chun-I Hsieh, Chris Carlson
  • Publication number: 20140134821
    Abstract: A method for fabricating a capacitor includes: (1) forming a bottom electrode on a substrate; (2) forming a template layer on the bottom electrode; (3) performing a plurality of atomic layer deposition (ALD) cycles by using water vapor as an oxidant thereby depositing a first TiO2 layer on the template layer; and (4) performing ozone pulse and purge step to transform entire thickness of the first TiO2 layer into rutile phase.
    Type: Application
    Filed: January 6, 2014
    Publication date: May 15, 2014
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Chun-I Hsieh, Vishwanath Bhat
  • Publication number: 20140131835
    Abstract: A capacitor structure includes a first electrode on a substrate; a template layer on the first electrode; a titanium oxide (TiO2) dielectric layer on the template layer, wherein the TiO2 dielectric layer has substantially only rutile phase; and a second electrode on the TiO2 dielectric layer. The titanium oxide dielectric layer is an undoped titanium oxide dielectric layer.
    Type: Application
    Filed: November 12, 2012
    Publication date: May 15, 2014
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Chun-I Hsieh, Vishwanath Bhat
  • Patent number: 8659869
    Abstract: A method for forming a stacking structure, including forming a ruthenium oxide layer over a substrate; forming a praseodymium oxide layer over the ruthenium oxide layer; and forming a titanium oxide layer over the praseodymium oxide layer; wherein the titanium oxide layer has a rutile phase with the existence of the praseodymium oxide layer underneath. The oxide layers are deposited by a plurality of atomic layer deposition cycles using ruthenium precursor, praseodymium precursor, titanium precursor, and ozone.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: February 25, 2014
    Assignee: Nanya Technology Corporation
    Inventors: Chun I Hsieh, Vishwanath Bhat, Jennifer Sigman, Vassil Antonov, Wei Hui Hsu
  • Patent number: 8564095
    Abstract: Methods of forming a capacitor including forming at least one aperture in a support material, forming a titanium nitride material within the at least one aperture, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The support material may then be removed and the titanium nitride material may be oxidized to form a titanium dioxide material. A second conductive material may then be formed over an outer surface of the titanium dioxide material. Capacitors, semiconductor devices and methods of forming a semiconductor device including the capacitors are also disclosed.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: October 22, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chun-I Hsieh, Chris Carlson
  • Publication number: 20130260529
    Abstract: Methods of forming a capacitor including forming at least one aperture in a support material, forming a titanium nitride material within the at least one aperture, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The support material may then be removed and the titanium nitride material may be oxidized to form a titanium dioxide material. A second conductive material may then be formed over an outer surface of the titanium dioxide material.
    Type: Application
    Filed: May 28, 2013
    Publication date: October 3, 2013
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chun-I Hsieh, Chris Carlson
  • Publication number: 20130252348
    Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
    Type: Application
    Filed: May 27, 2013
    Publication date: September 26, 2013
    Applicant: NANYA TECHNOLOGY CORP.
    Inventors: Chun-I Hsieh, Chang-Rong Wu
  • Patent number: 8535954
    Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: September 17, 2013
    Assignee: Nanya Technology Corp.
    Inventors: Chun-I Hsieh, Chang-Rong Wu
  • Publication number: 20130182367
    Abstract: A method for forming a stacking structure, including forming a ruthenium oxide layer over a substrate; forming a praseodymium oxide layer over the ruthenium oxide layer; and forming a titanium oxide layer over the praseodymium oxide layer; wherein the titanium oxide layer has a rutile phase with the existence of the praseodymium oxide layer underneath. The oxide layers are deposited by a plurality of atomic layer deposition cycles using ruthenium precursor, praseodymium precursor, titanium precursor, and ozone.
    Type: Application
    Filed: January 12, 2012
    Publication date: July 18, 2013
    Applicant: Nan Ya Technology Corporation
    Inventors: Chun I HSIEH, Vishwanath Bhat, Jennifer Sigman, Vassil Antonov, Wei Hui Hsu
  • Patent number: 8487290
    Abstract: A method for fabricating an RRAM is provided. First, a bottom electrode is formed. A resistive layer is formed on the bottom electrode. A top electrode is then formed on the resistive layer, wherein the top electrode is selected from the group consisting of indium tin oxide (ITO) and indium zinc oxide (IZO). Finally, the top electrode is irradiated with UV light.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: July 16, 2013
    Assignee: Nanya Technology Corp.
    Inventors: Chun-I Hsieh, Chang-Rong Wu, Neng-Tai Shih, Kou-Chen Liu
  • Publication number: 20130161786
    Abstract: A capacitor array includes a plurality of capacitors and a support frame. Each capacitor includes an electrode. The support frame supports the plurality of electrodes and includes a plurality of support structures corresponding to the plurality of electrodes. Each support structure may surround the respective electrode. The support frame may include oxide of a doped oxidizable material.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 27, 2013
    Applicant: Nan Ya Technology Corporation
    Inventors: Jen Jui Huang, Che Chi Lee, Shih Shu Tsai, Cheng Shun Chen, Shao Ta Hsu, Chao Wen Lay, Chun I. Hsieh, Ching Kai Lin
  • Publication number: 20120199944
    Abstract: Methods of forming a capacitor including forming at least one aperture in a support material, forming a titanium nitride material within the at least one aperture, forming a ruthenium material within the at least one aperture over the titanium nitride material, and forming a first conductive material over the ruthenium material within the at least one aperture. The support material may then be removed and the titanium nitride material may be oxidized to form a titanium dioxide material. A second conductive material may then be formed over an outer surface of the titanium dioxide material. Capacitors, semiconductor devices and methods of forming a semiconductor device including the capacitors are also disclosed.
    Type: Application
    Filed: February 7, 2011
    Publication date: August 9, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Tsai-Yu Huang, Vishwanath Bhat, Vassil Antonov, Chun-I Hsieh, Chris Carlson
  • Publication number: 20120146168
    Abstract: A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
    Type: Application
    Filed: February 22, 2012
    Publication date: June 14, 2012
    Inventors: Chun-I Hsieh, Chang-Rong Wu