Abstract: A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.

Abstract: A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.

Abstract: A fabrication method of a thin film transistor includes providing a substrate at first. Thereafter, a first gate is formed on the substrate. An insulator is then formed to cover the first gate and a portion of the substrate. After that, a channel structure is formed on the insulator above the first gate. In addition, a metal layer is formed to cover the channel structure and a portion of the insulator. Next, the metal layer is patterned, and at least the metal layer on two sidewalls of the channel structure is retained to form a source and a drain, respectively. Moreover, a passivation layer is formed to at least cover the source, the drain and a portion of the insulator.