Abstract: A method for managing a memory apparatus including a plurality of physical blocks, and a volatile memory includes: obtaining a first host address and first data, and obtaining a second host address and second data; linking the first host address and second host address to a first page and second page of the physical block, and storing the first data and second data into the physical block; building a valid/invalid page count table according to a valid/invalid page count of the physical block; building a valid page position table according to the valid/invalid page count table, and storing the valid/invalid page count table in the volatile memory; and when a valid/invalid page count of the physical block indicates the physical block should be erased, using the valid page position table to move valid pages of the physical block to another physical block.

Abstract: A method for managing a memory apparatus including a plurality of non-volatile (NV) memory elements includes: programming a physical block of a specific NV memory element, including: receiving a host command from a host; obtaining a host address and data from the host command; and linking the host address to a page of a physical block of the specific NV memory element and storing the data into the physical block. Before the pages of the physical block are fully programmed, a temporary local page linking address table is stored and is updated each time a linking relationship is changed. When the memory apparatus is to be shut down, the temporary local page linking address table is written to the specific NV memory element; and when the memory apparatus begins a start-up process, a global page address linking table is built by reading the local page address linking table.

Abstract: A method for managing a memory apparatus including a plurality of non-volatile (NV) memory elements includes: programming a physical block of a specific NV memory element, including: receiving a host command from a host; obtaining a host address and data from the host command; and linking the host address to a page of a physical block of the specific NV memory element and storing the data into the physical block. Before the pages of the physical block are fully programmed, a temporary local page linking address table is stored and is updated each time a linking relationship is changed. When the memory apparatus is to be shut down, the temporary local page linking address table is written to the specific NV memory element; and when the memory apparatus begins a start-up process, a global page address linking table is built by reading the local page address linking table.

Abstract: A method for managing a memory apparatus comprising a plurality of NV memory elements is disclosed. The method includes providing a physical block of each NV memory element with a local page address linking table by obtaining a first host address and first data from a first host command, and obtaining a second host address and second data from a second host command; linking the first host address to a first page of the physical block; and linking the second host address to a second page of the physical block. A global page address linking table is built by reading the local page address linking tables and stored in a volatile memory. For the local page address linking table, a difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A method for managing a memory apparatus comprising a plurality of NV memory elements is disclosed. The method includes providing a physical block of each NV memory element with a local page address linking table by obtaining a first host address and first data from a first host command, and obtaining a second host address and second data from a second host command; linking the first host address to a first page of the physical block; and linking the second host address to a second page of the physical block. A global page address linking table is built by reading the local page address linking tables and stored in a volatile memory. For the local page address linking table, a difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A memory apparatus includes: a plurality of non-volatile (NV) memory elements each including a plurality of physical blocks; a volatile memory for storing a global page address linking table; a transmission interface, for receiving commands from a host; and a processing unit, for obtaining a first host address and first data from a first host command, and a second host address and second data from a second host command, linking the first host address to a first page of a physical block and storing the first data in the first page, and linking the second host address to a second page of the physical block and storing the second data in the second page to build a local page address linking table; wherein a difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element including a plurality of physical blocks includes: obtaining a first host address and first data from a received first access command; obtaining a second host address and second data from a received second access command; linking the first host address to at least a first page of the physical block and linking the second host address to at least a second page of the physical block; storing the first data and second data into the physical block; and selectively erasing a portion of the physical block according to a valid/invalid page count of the physical block, the valid/invalid page count corresponding to accessing pages of the physical block. A difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A memory apparatus includes: a plurality of non-volatile (NV) memory elements each including a plurality of physical blocks; a volatile memory for storing a global page address linking table; a transmission interface, for receiving commands from a host; and a processing unit, for obtaining a first host address and first data from a first host command, and a second host address and second data from a second host command, linking the first host address to a first page of a physical block and storing the first data in the first page, and linking the second host address to a second page of the physical block and storing the second data in the second page to build a local page address linking table; wherein a difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element including a plurality of physical blocks includes: obtaining a first host address and first data from a received first access command; obtaining a second host address and second data from a received second access command; linking the first host address to at least a first page of the physical block and linking the second host address to at least a second page of the physical block; storing the first data and second data into the physical block; and selectively erasing a portion of the physical block according to a valid/invalid page count of the physical block, the valid/invalid page count corresponding to accessing pages of the physical block. A difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A memory apparatus includes at least one non-volatile memory element, which includes a plurality of physical blocks. A method for managing the memory apparatus includes: obtaining a first host address from a received first access command; linking the first host address to a first page of the physical block; obtaining a second host address from a received second access command; linking the second host address to a second page of the physical block; and selectively erasing a portion of the blocks according to a valid/invalid page count of the physical block corresponding to accessing pages of the physical block. A difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: A memory apparatus includes at least one non-volatile memory element, which includes a plurality of physical blocks. A method for managing the memory apparatus includes: obtaining a first host address from a received first access command; linking the first host address to a first page of the physical block; obtaining a second host address from a received second access command; linking the second host address to a second page of the physical block; and selectively erasing a portion of the blocks according to a valid/invalid page count of the physical block corresponding to accessing pages of the physical block. A difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: The system and apparatus for managing flash memory data includes a host transmitting data, wherein when the data transmitted from the host have a first time transmission trait and the address for the data indicates a temporary address, temporary data are retrieved from the temporary address to an external buffer. A writing command is then executed and the temporary data having a destination address are written to a flash memory buffer. When the flash memory buffer is not full, the buffer data are written into a temporary block of the flash memory. The writing of buffer data into the temporary block includes using an address changing command, or executing a writing command to rewrite the external buffer data to the flash memory buffer so that the data are written into the temporary block.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: providing at least one block of the memory apparatus with at least one local page address linking table within the memory apparatus, wherein the at least one local page address linking table includes linking relationships between at least one physical page address of the at least one block and at least one logical page address; and building a global page address linking table of the memory apparatus according to the at least one local page address linking table.

Abstract: A memory apparatus includes at least one NV memory element, which includes a plurality of blocks. A method for managing the memory apparatus includes: receiving a first access command from a host; analyzing the first access command to obtain a first host address; linking the first host address to a first page of the physical block; receiving a second access command from the host; analyzing the second access command to obtain a second host address; linking the second host address to a second page of the physical block; recording a valid/invalid page count of the physical block corresponding to accessing pages of the physical block; and determining whether to erase a portion of the blocks according to the valid/invalid page count. A difference value of the first host address and the second host address is greater than a number of pages of the physical block.

Abstract: The system and apparatus for managing flash memory data includes a host transmitting data, wherein when the data transmitted from the host have a first time transmission trait and the address for the data indicates a temporary address, temporary data are retrieved from the temporary address to an external buffer. A writing command is then executed and the temporary data having a destination address are written to a flash memory buffer. When the flash memory buffer is not full, the buffer data are written into a temporary block of the flash memory. The writing of buffer data into the temporary block includes using an address changing command, or executing a writing command to rewrite the external buffer data to the flash memory buffer so that the data are written into the temporary block.

Abstract: A method for managing a memory apparatus including at least one non-volatile (NV) memory element includes: recording valid/invalid page position information of at least one block; and moving valid data contained in at least a valid page of the block according to the valid/invalid page position information; where the block is an erasing unit. For example, the valid/invalid page position information may contain relative position information of the valid data in the block. More particularly, the valid/invalid page position information may contain a plurality of bits, the ranking of each bit may represent a page address offset of each page within the block, and each bit may respectively indicate whether each page in the block is valid or invalid.

Abstract: The system and apparatus for managing flash memory data includes a host transmitting data, wherein when the data transmitted from the host have a first time transmission trait and the address for the data indicates a temporary address, temporary data are retrieved from the temporary address to an external buffer. A writing command is then executed and the temporary data having a destination address are written to a flash memory buffer. When the flash memory buffer is not full, the buffer data are written into a temporary block of the flash memory. The writing of buffer data into the temporary block includes using an address changing command, or executing a writing command to rewrite the external buffer data to the flash memory buffer so that the data are written into the temporary block.

Abstract: A method for managing a plurality of blocks of a Flash memory includes: sieving out at least one first block having invalid pages from the plurality of blocks; and moving data of a portion of valid pages of the first block to a second block, where data of all valid pages of the first block is not moved to the second block at a time. An associated memory device and a controller thereof are also provided, where the controller includes: a ROM arranged to store a program code; and a microprocessor arranged to execute the program code to control the access to the Flash memory and manage the plurality of blocks. The controller that executes the program code by utilizing the microprocessor sieves out the first block from the plurality of blocks, and moves the data of the portion of valid pages of the first block to the second block.

Abstract: The system and apparatus for managing flash memory data includes a host transmitting data, wherein when the data transmitted from the host have a first time transmission trait and the address for the data indicates a temporary address, temporary data are retrieved from the temporary address to an external buffer. A writing command is then executed and the temporary data having a destination address are written to a flash memory buffer. When the flash memory buffer is not full, the buffer data are written into a temporary block of the flash memory. The writing of buffer data into the temporary block includes using an address changing command, or executing a writing command to rewrite the external buffer data to the flash memory buffer so that the data are written into the temporary block.

Abstract: The system and apparatus for managing flash memory data includes a host transmitting data, wherein when the data transmitted from the host have a first time transmission trait and the address for the data indicates a temporary address, temporary data are retrieved from the temporary address to an external buffer. A writing command is then executed and the temporary data having a destination address are written to a flash memory buffer. When the flash memory buffer is not full, the buffer data are written into a temporary block of the flash memory. The writing of buffer data into the temporary block includes using an address changing command, or executing a writing command to rewrite the external buffer data to the flash memory buffer so that the data are written into the temporary block.