Patents by Inventor Chun-Lin Fang

Chun-Lin Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220165771
    Abstract: A pixel array may include a plurality of pixel regions including a first pixel region and a second pixel region. The pixel array may include a metal grid structure over the plurality of pixel regions. The pixel array may include a light blocking layer. A first portion of the light blocking layer may be over the first pixel region and under the metal grid structure. The first portion may have a first thickness. A second portion of the light blocking layer may be over the second pixel region and under the metal grid structure. The second portion may have a second thickness that is different from the first thickness.
    Type: Application
    Filed: November 20, 2020
    Publication date: May 26, 2022
    Inventors: Chun-Lin FANG, Ping-Hao LIN, Kuo-Cheng LEE
  • Publication number: 20220020787
    Abstract: A semiconductor device includes a first type of light sensing units, where each instance of the first type of light sensing units is operable to receive a first amount of radiation; and a second type of light sensing units, where each instance of the second type of light sensing units is operable to receive a second amount of radiation, and the second type of light sensing units is arranged in an array with the first type of light sensing units to form a pixel sensor. The first amount of radiation is smaller than the second amount of radiation, and at least a first instance of the first type of light sensing units is adjacent to a second instance first type of light sensing unit.
    Type: Application
    Filed: April 1, 2021
    Publication date: January 20, 2022
    Inventors: Li-Wen HUANG, Chun-Lin FANG, Kuan-Ling PAN, Ping-Hao LIN, Kuo-Cheng LEE, Cheng-Ming WU
  • Publication number: 20170358493
    Abstract: A semiconductor device includes a substrate and a through substrate via structure. The substrate has a through via hole. The through substrate via structure is disposed in the through via hole. The through substrate via structure disposed in the through via hole includes a liner structure and a metal layer. The liner structure includes at least two insulation liners and at least one conductive shielding layer disposed between the insulation liners, in which the insulation liners and the at least one conductive shielding layer conformally cover a sidewall and a bottom of the through via hole. The metal layer covers the liner structure and fills the through via hole.
    Type: Application
    Filed: June 13, 2016
    Publication date: December 14, 2017
    Inventors: Chun-Lin FANG, Ping-Hao LIN, Ching-Hua CHU, Hsiao-Chun LEE, Chi-Feng HUANG
  • Patent number: 9842774
    Abstract: A semiconductor device includes a substrate and a through substrate via structure. The substrate has a through via hole. The through substrate via structure is disposed in the through via hole. The through substrate via structure disposed in the through via hole includes a liner structure and a metal layer. The liner structure includes at least two insulation liners and at least one conductive shielding layer disposed between the insulation liners, in which the insulation liners and the at least one conductive shielding layer conformally cover a sidewall and a bottom of the through via hole. The metal layer covers the liner structure and fills the through via hole.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: December 12, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Lin Fang, Ping-Hao Lin, Ching-Hua Chu, Hsiao-Chun Lee, Chi-Feng Huang