Patents by Inventor Chun-Lin Liao

Chun-Lin Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240112928
    Abstract: A trimming method is provided. The trimming method includes the following steps. A first wafer including a substrate and a device layer over a first side of the substrate is provided. The first wafer is bonded to a second wafer with the first side of the substrate facing toward the second wafer. An edge trimming process is performed to remove a trimmed portion of the substrate from a second side opposite to the first side vertically downward toward the first side in a first direction along a perimeter of the substrate, wherein the edge trimming process results in the substrate having a flange pattern laterally protruding from the device layer and laterally surrounding an untrimmed portion of the substrate along a second direction perpendicular to the first direction.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: An-Hsuan Lee, Chen-Hao Wu, Chun-Hung Liao, Huang-Lin Chao
  • Publication number: 20230341458
    Abstract: A flying probe includes a test module and a processor. The test module measures a plurality of delta capacitances associated with a plurality of vias in a printed circuit board. The plurality of vias include first, second, third and fourth vias. Each different delta capacitance is measured between a different pair of the vias. The processor compares all the delta capacitances to a threshold value. In response to multiple delta capacitances associated with the first via being greater than or equal to the threshold value, the processor detects a possible via stripping issue for the first via.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Inventors: Ching-Huei Chen, Bhyrav Mutnury, Chun-Lin Liao, Chi-Hsiang Hung, Pei-Ju Lin
  • Publication number: 20230180382
    Abstract: A circuit board includes an insulation part, a support layer disposed on the insulation part, a metal case disposed in the insulation part, a heat-exchanging fluid distributed within the enclosed space, and a first porous material distributed within the enclosed space. The metal case is thermally coupled to the support layer and includes a first inner surface, a second inner surface opposite to the first inner surface and positioned between the first inner surface and the support layer, a third inner surface connecting the first inner surface and the second inner surface, and an enclosed space surrounded by the first inner surface, the second inner surface and the third inner surface. The first porous material is disposed on the first inner surface.
    Type: Application
    Filed: January 17, 2022
    Publication date: June 8, 2023
    Inventors: Chun-Lin LIAO, Pei-Chang HUANG
  • Patent number: 11026321
    Abstract: A differential trace pair system includes a board including a board structure having a first, a second, a third, and a fourth board structure member, wherein a distance between the first and the third board structure members is longer than a distance between the second and the fourth board structure members. The differential trace pair system further includes a differential trace pair that includes a first differential trace extending between the first and the third board structure members and a second differential trace extending between the second and the fourth board structure members. The second differential trace having a serpentine structure that includes a first portion that continuously transitions away from the first differential trace and a second portion that is contiguous with the first portion, the second portion continuously transitions towards the first differential trace.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: June 1, 2021
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Chun-Lin Liao, Bhyrav M. Mutnury
  • Patent number: 10897813
    Abstract: A differential trace pair system includes a board having a first, a second, a third, and a fourth board structure member. A differential trace pair in the board includes a first differential trace extending between the first and the third board structure members, and a second differential trace extending between the second and the fourth board structure members. The differential trace pair includes a serpentine region that includes a first portion and a second portion where the first and the second differential traces have a first width, are substantially parallel, and spaced apart by a first differential trace pair spacing, and a third portion in which the second differential trace includes a second width that is greater than the first width, the first and second differential traces are substantially parallel and spaced apart by a second differential trace pair spacing that is greater than the first differential trace pair spacing.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: January 19, 2021
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav M. Mutnury, Chun-Lin Liao
  • Patent number: 10881006
    Abstract: A package carrier includes a plurality of first circuit patterns, a plurality of second circuit patterns and an insulating material layer. The second circuit patterns are disposed between any two the first circuit patterns and are directly connected to the first circuit patterns. In a cross-sectional view, a first thickness of each of the first circuit patterns is greater than a second thickness of each of the second circuit patterns. A first surface of each of the first circuit patterns is aligned with a second surface of each of the second circuit patterns. The insulating material layer at least contacts the first circuit patterns.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: December 29, 2020
    Assignee: Unimicron Technology Corp.
    Inventors: Ra-Min Tain, Pei-Chang Huang, Chi-Chun Po, Chun-Lin Liao, Po-Hsiang Wang, Hsuan-Wei Chen
  • Patent number: 10856414
    Abstract: A printed circuit board includes a circuit trace and a connector pad. The connector pad provides electrical and mechanical mounting of a connector lead of a surface mount device and provides a circuit path between the surface mount device and the circuit trace. The connector pad includes 1) a connector pad base electrically coupled to the circuit trace, and 2) a first connector pad island electrically isolated from the connector pad base. The connector pad base has a length that is substantially equal to a length of a contact portion of the connector lead.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: December 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: Chun-Lin Liao, Ching-Huei Chen, Bhyrav M. Mutnury
  • Patent number: 10813211
    Abstract: Traces on a PCB can be spaced closer together than in conventional layouts, which previously required the pair-to-pair spacing for the high-speed differential stripline signals to be at least 5H if the signals are originating from the same source and 7H when the signals on two pairs of transmission lines in the traces originate from different sources. Traces may be spaced closer together when, for example, a ratio of the core height to the prepreg height of the printed circuit board is approximately equal to one. Traces may be spaced closer together when, for example, a ratio of the trace spacing distance to the core height distance is less than approximately one.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: October 20, 2020
    Assignee: Dell Products L.P.
    Inventors: Pei-Yang Weng, Chun-Lin Liao, Bhyrav Murthy Mutnury
  • Publication number: 20200329565
    Abstract: A package carrier includes a plurality of first circuit patterns, a plurality of second circuit patterns and an insulating material layer. The second circuit patterns are disposed between any two the first circuit patterns and are directly connected to the first circuit patterns. In a cross-sectional view, a first thickness of each of the first circuit patterns is greater than a second thickness of each of the second circuit patterns. A first surface of each of the first circuit patterns is aligned with a second surface of each of the second circuit patterns. The insulating material layer at least contacts the first circuit patterns.
    Type: Application
    Filed: January 10, 2020
    Publication date: October 15, 2020
    Applicant: Unimicron Technology Corp.
    Inventors: Ra-Min Tain, Pei-Chang Huang, Chi-Chun Po, Chun-Lin Liao, Po-Hsiang Wang, Hsuan-Wei Chen
  • Patent number: 10806024
    Abstract: In one or more embodiments, a circuit board may include a trace pair and a serpentine region of the trace pair, which may include: a first subregion in which the first trace includes a first portion that has a third width and a first length and in which the second trace includes a second portion, at least substantially parallel to the first portion, that has a fourth width, greater than the second width, and a second length; and a second subregion, adjacent to the first subregion, in which the first trace includes a third portion that has the third width and a third length and in which the second trace includes a third portion that has the fourth width and a third length, different from the second length.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: October 13, 2020
    Assignee: Dell Products L.P.
    Inventors: Bhyrav Murthy Mutnury, Chun-Lin Liao
  • Patent number: 10779404
    Abstract: A circuit board pad resonance control system includes a board. A signal transmission line is included on the board. A plurality of connector pads are positioned on the board. A first connector pad receives the signal transmission line adjacent a first end of that connector pad. The first connector pad includes a mounting surface that mounts directly to a coupling element that is configured to couple a subsystem to the board, and reduces a resonance that is produced by an open portion of a signal transmission path that is created when the coupling element is directly mounted to the mounting surface of the first connector pad in a first orientation. In a specific example, the mounting surface may include a plurality of protrusions, a plated surface, and/or a mask that reduces the conductivity of the connector pad which reduces signal integrity issues due to resonance.
    Type: Grant
    Filed: April 12, 2018
    Date of Patent: September 15, 2020
    Assignee: Dell Products L.P.
    Inventors: Vasa Mallikarjun Goud, Chun-Lin Liao, Bhyrav M. Mutnury
  • Publication number: 20200253036
    Abstract: A differential trace pair system includes a board including a board structure having a first, a second, a third, and a fourth board structure member, wherein a distance between the first and the third board structure members is longer than a distance between the second and the fourth board structure members. The differential trace pair system further includes a differential trace pair that includes a first differential trace extending between the first and the third board structure members and a second differential trace extending between the second and the fourth board structure members. The second differential trace having a serpentine structure that includes a first portion that continuously transitions away from the first differential trace and a second portion that is contiguous with the first portion, the second portion continuously transitions towards the first differential trace.
    Type: Application
    Filed: February 1, 2019
    Publication date: August 6, 2020
    Inventors: Umesh Chandra, Chun-Lin Liao, Bhyrav M. Mutnury
  • Publication number: 20200196437
    Abstract: Traces on a PCB can be spaced closer together than in conventional layouts, which previously required the pair-to-pair spacing for the high-speed differential stripline signals to be at least 5H if the signals are originating from the same source and 7H when the signals on two pairs of transmission lines in the traces originate from different sources. Traces may be spaced closer together when, for example, a ratio of the core height to the prepreg height of the printed circuit board is approximately equal to one. Traces may be spaced closer together when, for example, a ratio of the trace spacing distance to the core height distance is less than approximately one.
    Type: Application
    Filed: December 14, 2018
    Publication date: June 18, 2020
    Applicant: Dell Products L.P.
    Inventors: Pei-Yang Weng, Chun-Lin Liao, Bhyrav Murthy Mutnury
  • Publication number: 20200170103
    Abstract: In one or more embodiments, a circuit board may include a trace pair and a serpentine region of the trace pair, which may include: a first subregion in which the first trace includes a first portion that has a third width and a first length and in which the second trace includes a second portion, at least substantially parallel to the first portion, that has a fourth width, greater than the second width, and a second length; and a second subregion, adjacent to the first subregion, in which the first trace includes a third portion that has the third width and a third length and in which the second trace includes a third portion that has the fourth width and a third length, different from the second length.
    Type: Application
    Filed: January 28, 2020
    Publication date: May 28, 2020
    Inventors: Bhyrav Murthy Mutnury, Chun-Lin Liao
  • Publication number: 20200092986
    Abstract: A differential trace pair system includes a board having a first, a second, a third, and a fourth board structure member. A differential trace pair in the board includes a first differential trace extending between the first and the third board structure members, and a second differential trace extending between the second and the fourth board structure members. The differential trace pair includes a serpentine region that includes a first portion and a second portion where the first and the second differential traces have a first width, are substantially parallel, and spaced apart by a first differential trace pair spacing, and a third portion in which the second differential trace includes a second width that is greater than the first width, the first and second differential traces are substantially parallel and spaced apart by a second differential trace pair spacing that is greater than the first differential trace pair spacing.
    Type: Application
    Filed: November 18, 2019
    Publication date: March 19, 2020
    Inventors: Umesh Chandra, Bhyrav M. Mutnury, Chun-Lin Liao
  • Patent number: 10595396
    Abstract: In one or more embodiments, a circuit board may include a trace pair and a serpentine region of the trace pair, which may include: a first subregion in which the first trace includes a first portion that has a third width and a first length and in which the second trace includes a second portion, at least substantially parallel to the first portion, that has a fourth width, greater than the second width, and a second length; and a second subregion, adjacent to the first subregion, in which the first trace includes a third portion that has the third width and a third length and in which the second trace includes a third portion that has the fourth width and a third length, different from the second length.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: March 17, 2020
    Assignee: Dell Products L.P.
    Inventors: Bhyrav M. Mutnury, Chun-Lin Liao
  • Patent number: 10492290
    Abstract: A circuit board pad mounting orientation system includes a board. A signal transmission line is included on the board. A plurality of connector pads are positioned on the board. At least one connector pad receives the signal transmission line adjacent a first end of that connector pad. At least one connector pad includes a second end that provides a reduction in a width of that connector pad to indicate a mounting orientation for coupling to the connector pad that receives the signal transmission line. In a specific example, a first connector pad receives the signal transmission line, includes the first end, and includes the second end that is opposite the first connector pad from the first end and that provides the reduction in the width of the first connector pad to indicate the mounting orientation for coupling to the first connector pad.
    Type: Grant
    Filed: March 2, 2018
    Date of Patent: November 26, 2019
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Chun-Lin Liao, Bhyrav M. Mutnury
  • Patent number: 10485096
    Abstract: A differential trace pair system includes a board having a first, a second, a third, and a fourth board structure member. A differential trace pair in the board includes a first differential trace extending between the first and the third board structure members, and a second differential trace extending between the second and the fourth board structure members. The differential trace pair includes a serpentine region that includes a first portion and a second portion where the first and the second differential traces have a first width, are substantially parallel, and spaced apart by a first differential trace pair spacing, and a third portion in which the second differential trace includes a second width that is greater than the first width, the first and second differential traces are substantially parallel and spaced apart by a second differential trace pair spacing that is greater than the first differential trace pair spacing.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: November 19, 2019
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Bhyrav M. Mutnury, Chun-Lin Liao
  • Publication number: 20190320529
    Abstract: A circuit board pad resonance control system includes a board. A signal transmission line is included on the board. A plurality of connector pads are positioned on the board. A first connector pad receives the signal transmission line adjacent a first end of that connector pad. The first connector pad includes a mounting surface that mounts directly to a coupling element that is configured to couple a subsystem to the board, and reduces a resonance that is produced by an open portion of a signal transmission path that is created when the coupling element is directly mounted to the mounting surface of the first connector pad in a first orientation. In a specific example, the mounting surface may include a plurality of protrusions, a plated surface, and/or a mask that reduces the conductivity of the connector pad which reduces signal integrity issues due to resonance.
    Type: Application
    Filed: April 12, 2018
    Publication date: October 17, 2019
    Inventors: Vasa Mallikarjun Goud, Chun-Lin Liao, Bhyrav M. Mutnury
  • Publication number: 20190281698
    Abstract: A printed circuit board includes a circuit trace and a connector pad. The connector pad provides electrical and mechanical mounting of a connector lead of a surface mount device and provides a circuit path between the surface mount device and the circuit trace. The connector pad includes 1) a connector pad base electrically coupled to the circuit trace, and 2) a first connector pad island electrically isolated from the connector pad base. The connector pad base has a length that is substantially equal to a length of a contact portion of the connector lead.
    Type: Application
    Filed: March 12, 2018
    Publication date: September 12, 2019
    Inventors: Chun-Lin Liao, Ching-Huei Chen, Bhyrav M. Mutnury