Abstract: A micro device under test (DUT) carrier includes a carrier main body, a pusher and a spring. The carrier main body includes a plurality of bearing stages. Each bearing stage is utilized to bear a micro DUT. The pusher, operated to move from a locking position to an opening position, includes a pusher main body and a plurality of locking elements. Each locking element corresponds to each bearing stage, and is located next to each bearing stage. The spring is utilized to send the pusher back to the locking position, so that each locking element restricts movement of each micro DUT.

Abstract: A paper feeding mechanism includes a mechanical frame, a drive assembly mounted to the mechanical frame, an input tray, a pickup assembly driven by the drive assembly, an elevating assembly and a control assembly. The elevating assembly mounted to the mechanical frame and pivoted to a bottom of the rear end of input tray includes a drive shaft, a gear assembly and an elastic element. The rotating shaft defines two cam parts projecting beyond the rotating shaft. The rotating shaft is capable of rotating to make the cam parts press downward on or break away from the input tray so as to drive the input tray to swing downward or swing upward under an elastic push action of the elastic element. The control assembly includes a control system and a paper sensor controlled by the control system for detecting whether there is any paper on the input tray.

Abstract: A thin film transistor array substrate and repairing methods thereof are disclosed. The thin film transistor array substrate comprises openings in each pixel electrode, each capacitor electrode and each common line. The openings of the capacitor electrode and the common line are located in the opening of the pixel electrode. The opening of the capacitor electrode exposes a portion area of the capacitor electrode and the common line. The pixel electrode is coupled to the common line through a connecting conductive layer. The MII storage capacitor Cst is formed by the pixel electrode and the capacitor electrode. When the MII storage capacitor Cst fails, the MII storage capacitor Cst can be switched to the MIM storage capacitor Cst by laser repairing.

Abstract: A thin film transistor array substrate and repairing methods thereof are disclosed. The thin film transistor array substrate comprises openings in each pixel electrode, each capacitor electrode and each common line. The openings of the capacitor electrode and the common line are located in the opening of the pixel electrode. The opening of the capacitor electrode exposes a portion area of the capacitor electrode and the common line. The pixel electrode is coupled to the common line through a connecting conductive layer. The MII storage capacitor Cst is formed by the pixel electrode and the capacitor electrode. When the MII storage capacitor Cst fails, the MII storage capacitor Cst can be switched to the MIM storage capacitor Cst by laser repairing.

Abstract: A method of determining a composition of an integrated circuit feature, including collecting intensity data representative of spectral wavelengths of radiant energy generated by a plasma during plasma nitridation of an integrated circuit feature disposed on a substrate, analysing the in intensity data to determine a peak intensity at one of the wavelengths, and determining a component concentration of the feature based on the peak intensity.

Abstract: A method of determining a composition of an integrated circuit feature, including collecting intensity data representative of spectral wavelengths of radiant energy generated by a plasma during plasma nitridation of an integrated circuit feature disposed on a substrate, analyzing the intensity data to determine a peak intensity at one of the wavelengths, and determining a component concentration of the feature based on the peak intensity.

Abstract: The present disclosure provides a method for forming a gate stack structure for semiconductor devices. The disclosed method comprises steps such as forming a dielectric layer on a substrate; applying a plasma nitridation process on the formed dielectric layer; applying a first anneal process on the deposited dielectric layer; etching the dielectric layer to a predetermined thickness using a diluted etchant; applying a second anneal process using an oxygen environment on the etched dielectric layer after the etching; and forming a gate electrode layer on top of the dielectric layer. The etching makes the top portion of the etched dielectric layer have a significantly higher concentration of nitrogen than the lower portion of the etched dielectric layer so as the leakage current is significantly reduced.