Patents by Inventor Chun-Ming Chiu

Chun-Ming Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240387534
    Abstract: A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Shih-Chuan Chiu, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12148805
    Abstract: A semiconductor structure includes an epitaxial region having a front side and a backside. The semiconductor structure includes an amorphous layer formed over the backside of the epitaxial region, wherein the amorphous layer includes silicon. The semiconductor structure includes a first silicide layer formed over the amorphous layer. The semiconductor structure includes a first metal contact formed over the first silicide layer.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: November 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Chuan Chiu, Huan-Chieh Su, Pei-Yu Wang, Cheng-Chi Chuang, Chun-Yuan Chen, Li-Zhen Yu, Chia-Hao Chang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12125852
    Abstract: A semiconductor device according to the present disclosure includes a bottom dielectric feature on a substrate, a plurality of channel members directly over the bottom dielectric feature, a gate structure wrapping around each of the plurality of channel members, two first epitaxial features sandwiching the bottom dielectric feature along a first direction, and two second epitaxial features sandwiching the plurality of channel members along the first direction.
    Type: Grant
    Filed: July 28, 2023
    Date of Patent: October 22, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Shih-Chuan Chiu, Cheng-Chi Chuang, Yu-Ming Lin, Chih-Hao Wang
  • Patent number: 12125956
    Abstract: A semiconductor device is provided, which includes a semiconductor stack and a first contact structure. The semiconductor stack includes an active layer and has a first surface and a second surface. The first contact structure is located on the first surface and includes a first semiconductor layer, a first metal element-containing structure and a first p-type or n-type layer. The first metal element-containing structure includes a first metal element. The first p-type or n-type layer physically contacts the first semiconductor layer and the first metal element-containing structure. The first p-type or n-type layer includes an oxygen element (O) and a second metal element and has a thickness less than or equal to 20 nm, and the first semiconductor layer includes a phosphide compound or an arsenide compound.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: October 22, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Yu-Tsu Lee, Yi-Yang Chiu, Chun-Wei Chang, Min-Hao Yang, Wei-Jen Hsueh, Yi-Ming Chen, Shih-Chang Lee, Chung-Hao Wang
  • Patent number: 12108574
    Abstract: A two-phase immersion-type heat dissipation structure having fins for facilitating bubble generation is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, and a plurality of fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fin surface is connected with the plurality of fins. More than half of the fins are functional fins, and at least one side surface of each of the functional fins and the fin surface have an included angle therebetween that is from 80 degrees to 100 degrees. A center line average roughness (Ra) of the side surface is less than 3 ?m, and a ten-point average roughness (Rz) of the side surface is not less than 12 ?m.
    Type: Grant
    Filed: November 6, 2022
    Date of Patent: October 1, 2024
    Assignee: AMULAIRE THERMAL TECHNOLOGY, INC.
    Inventors: Chun-Te Wu, Ching-Ming Yang, Yu-Wei Chiu, Tze-Yang Yeh
  • Patent number: 12074252
    Abstract: An optoelectronic semiconductor device includes a substrate, a first type semiconductor structure, a second type semiconductor structure, an active structure and a contact structure. The first type semiconductor structure is located on the substrate and has a first protrusion part with a first thickness and a platform part with a second thickness. The second type semiconductor structure is located on the first type semiconductor structure. The active structure is between the first type semiconductor structure and the second type semiconductor structure. The contact structure is disposed between the first type semiconductor structure and the substrate. The second thickness of the platform part is in a range of 0.01 ?m to 1 ?m.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: August 27, 2024
    Assignee: EPISTAR CORPORATION
    Inventors: Chung-Hao Wang, Yu-Chi Wang, Yi-Ming Chen, Yi-Yang Chiu, Chun-Yu Lin
  • Publication number: 20240280332
    Abstract: A two-phase immersion-cooling heat-dissipation structure having skived fins with high surface roughness includes an immersion-cooling substrate and a plurality of skived fins. The immersion-cooling substrate has a top surface and a bottom surface that are opposite to each other, the bottom surface is used for contacting a heat source immersed in a two-phase coolant, the top surface is connected with the plurality of skived fins, a center line average roughness Ra of a surface of the plurality of skived fins is greater than 10 ?m, and a ten point average roughness Rz of the surface of the plurality of skived fins is greater than 20 ?m, such that a ratio between a surface area of the plurality of skived fins in contact with the two-phase coolant and a volume of the plurality of skived fins is greater than 400.
    Type: Application
    Filed: February 17, 2023
    Publication date: August 22, 2024
    Inventors: YU-WEI CHIU, CHING-MING YANG, CHUN-TE WU, TZE-YANG YEH
  • Publication number: 20240276676
    Abstract: A two-phase immersion-cooling heat-dissipation structure having shortened evacuation route for vapor bubbles includes an immersion-cooling substrate having a first surface and a second surface that are opposite to each other and immersion-cooling fins. The second surface contacts a heat source immersed in a two-phase coolant, and the first surface connects to the immersion-cooling fins. The immersion-cooling fins include at least one skived fin integrally formed on the first surface of the immersion-cooling substrate by skiving, and further include at least one functional fin. The functional fin is a single continuous fin extends lengthwise in a vapor bubbles evacuation direction, has a central portion corresponding in position to the heat source and upper and lower end portions located away from the heat source, and a height of the central portion is greater than at least one of a height of the upper and lower end portions.
    Type: Application
    Filed: February 10, 2023
    Publication date: August 15, 2024
    Inventors: CHING-MING YANG, CHUN-TE WU, YU-WEI CHIU, TZE-YANG YEH
  • Publication number: 20240268078
    Abstract: A two-phase immersion-cooling heat-dissipation structure having skived fins includes an immersion-cooling substrate and a plurality of immersion-cooling fins. The immersion-cooling substrate has a top surface and a bottom surface that are opposite to each other, the bottom surface is used for contacting a heat-generating component immersed in a two-phase coolant, the top surface is connected with the plurality of immersion-cooling fins, the plurality of immersion-cooling fins include at least one skived fin integrally formed on the top surface of the immersion-cooling substrate, and the plurality of immersion-cooling fins are non-linearly arranged. A thickness of any one of the plurality of immersion-cooling fins ranges from 0.1 mm to 0.35 mm, a height of any one of the plurality of immersion-cooling fins ranges from 5 mm to 10 mm, and a gap between any two of the plurality of immersion-cooling fins ranges from 0.1 mm to 0.35 mm.
    Type: Application
    Filed: February 2, 2023
    Publication date: August 8, 2024
    Inventors: CHING-MING YANG, CHUN-TE WU, TZE-YANG YEH, YU-WEI CHIU
  • Publication number: 20240243097
    Abstract: A power module package structure includes a first substrate and a power component. The first substrate includes at least one conductive layer on a surface thereof. The power component includes a first chip and a first spacer. The first chip has at least one electrode. The first spacer in a heat dissipation space between the first substrate and the first chip includes an insulating heat dissipation layer in the heat dissipation space and multiple vertical conductive connectors, each of the vertical conductive connectors penetrates the insulating heat dissipation layer. The insulating heat dissipation layer surrounds the vertical conductive connectors and electrically isolates the vertical conductive connectors. The vertical conductive connector includes two opposite ends, one end electrically connected to the conductive layer, and the other end electrically connected to the electrode to form a conductive path and a heat dissipation path between the first chip and the first substrate.
    Type: Application
    Filed: January 18, 2024
    Publication date: July 18, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Yu-Ming Peng, I-Hung Chiang, Chun-Kai Liu, Po-Kai Chiu, Hsin-Han Lin, Kuo-Shu Kao
  • Publication number: 20240244793
    Abstract: A two-phase immersion-type heat dissipation device is provided. The two-phase immersion-type heat dissipation device includes a heat dissipation substrate and a plurality of reinforced fins. The heat dissipation substrate has a first surface and a second surface configured to be in contact with a heating element. The first surface is opposite to the second surface and is arranged away from the heating element. The plurality of reinforced fins are integrally formed on the first surface of the heat dissipation substrate, and a thickness of each of the plurality of reinforced fins is less than 1 mm. According to a scanning electron microscopy image of electron backscattered diffraction, a median of local misorientation distribution of the plurality of reinforced fins is greater than 1.6 times a median of local misorientation distribution of the heat dissipation substrate.
    Type: Application
    Filed: January 17, 2023
    Publication date: July 18, 2024
    Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
  • Publication number: 20240244797
    Abstract: A two-phase immersion-type composite heat dissipation device is provided, which includes a heat dissipation substrate, a plurality of fins, and a surface porous layer. The heat dissipation substrate has a first surface and a second surface. The first surface is configured to be in contact with a heat source, and the second surface is opposite to the first surface and is distant from the heat source. A projection region of the heat dissipation substrate that corresponds to the heat source is defined as a high-temperature region, and a low-temperature region is defined at an outer periphery of the high-temperature region. The fins are opposite to the heat source, and are disposed within the high-temperature region of the second surface of the heat dissipation substrate. The surface porous layer is disposed within a range of the low-temperature region of the heat dissipation substrate.
    Type: Application
    Filed: January 16, 2023
    Publication date: July 18, 2024
    Inventors: CHUN-TE WU, CHING-MING YANG, YU-WEI CHIU, TZE-YANG YEH
  • Publication number: 20230348673
    Abstract: The present disclosure provides a toughened resin composition, which includes: (A) a toughened and modified compound, which includes a styrene maleic anhydride compound, an anhydride grafted olefin polymer, and a diisocyanate compound; (B) a thermosetting polymer; and (C) a toughening resin; wherein, in the toughened and modified compound, the diisocyanate compound forms a polyimide bond with the styrene maleic anhydride compound and the anhydride grafted olefin polymer, respectively. The present disclosure has high toughness and excellent mechanical properties; thus, it may have a wide range of applications in the fields of electronics, aerospace and the like.
    Type: Application
    Filed: October 12, 2022
    Publication date: November 2, 2023
    Inventors: Sheng-Yen WU, Po-Hsun LEE, Chun-Ming CHIU, Wen-Pin SU, Jui-Teng HSU, Chen-Yu HUANG, Chun-Han LIN
  • Patent number: 11476199
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.
    Type: Grant
    Filed: March 14, 2021
    Date of Patent: October 18, 2022
    Assignee: Unimicron Technology Corp.
    Inventors: Yi Lin, Chun-Ming Chiu, Hung-Chih Lee, Chang-Fu Chen
  • Publication number: 20210202394
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.
    Type: Application
    Filed: March 14, 2021
    Publication date: July 1, 2021
    Inventors: Yi LIN, Chun-Ming CHIU, Hung-Chih LEE, Chang-Fu CHEN
  • Patent number: 10978401
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: April 13, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Yi Lin, Chun-Ming Chiu, Hung-Chih Lee, Chang-Fu Chen
  • Patent number: 10652996
    Abstract: A shielding film comprises multiple layers including one or more of a structured adhesive layer, an electrically conductive layer, an electrically insulative thermally conductive layer, and an electrically conductive adhesive layer. The electrically conductive shielding layer extends laterally beyond the structured adhesive layer. The electrically insulative thermally conductive layer is disposed between the electrically conductive shielding layer and the structured adhesive layer and is coextensive with the structured adhesive layer. The electrically conductive adhesive layer is disposed between the electrically conductive shielding layer and the thermally conductive layer and is coextensive with the electrically conductive shielding layer.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: May 12, 2020
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Chun-Ming Chiu, Wei-Yu Chen, I-Liang Lee
  • Publication number: 20190279936
    Abstract: A package structure includes a first substrate, a second substrate, a plurality of dies, a plurality of first conductive elements, and a plurality of second conductive elements. The first substrate has a recessed region. The second substrate is disposed in the recessed region and protrudes from the first substrate. The dies are disposed on the first substrate and the second substrate, such that the second substrate is disposed between the first substrate and the dies. The first conductive elements are disposed between the dies and the first substrate. The dies are electrically connected with the first substrate through the first conductive elements. The second conductive elements are disposed between the dies and the second substrate. The dies are electrically connected with the second substrate through the second conductive elements.
    Type: Application
    Filed: June 6, 2018
    Publication date: September 12, 2019
    Inventors: Yi LIN, Chun-Ming CHIU, Hung-Chih LEE, Chang-Fu CHEN
  • Publication number: 20170181268
    Abstract: A shielding film comprises multiple layers including one or more of a structured adhesive layer, an electrically conductive layer, an electrically insulative thermally conductive layer, and an electrically conductive adhesive layer. The electrically conductive shielding layer extends laterally beyond the structured adhesive layer. The electrically insulative thermally conductive layer is disposed between the electrically conductive shielding layer and the structured adhesive layer and is coextensive with the structured adhesive layer. The electrically conductive adhesive layer is disposed between the electrically conductive shielding layer and the thermally conductive layer and is coextensive with the electrically conductive shielding layer.
    Type: Application
    Filed: November 16, 2016
    Publication date: June 22, 2017
    Inventors: Chun-Ming Chiu, Wei-Yu Chen, I-Liang Lee
  • Publication number: 20160303838
    Abstract: A transparent multilayer assembly, including a transparent organic polymeric flexible substrate, a transparent conductive layer on the first major surface of the substrate and an antireflective layer on the second major surface of the substrate.
    Type: Application
    Filed: December 8, 2014
    Publication date: October 20, 2016
    Inventors: Wan-Chun Chen, Chun-Ming Chiu, Hui Luo, Tze Yuan Wang, Ta-Hua Yu