Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.

Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.

Abstract: A memory device includes a main array comprising main memory cells; a redundancy array comprising redundancy memory cells; and write circuitry configured to perform a first programming operation on a main memory cell, to detect whether a current of the main memory cell exceeds a predefined current threshold during the first programming operation, and to disable a second programming operation for a redundancy memory cell if the current of the main memory cell exceeds the predefined current threshold during the first programming operation.

Abstract: A video device, a wireless audio device and a method for performing audio and video (AV) synchronization between the video device and the wireless audio device are provided. The method includes: utilizing a controller of the video device to determine a video delay of the video device; utilizing the controller to determine an audio delay of the video device; utilizing the controller to receive information of a communications quality of the wireless audio device from the wireless audio device, to determine a wireless communications delay between the video device and the wireless audio device according to the communications quality; utilizing the controller to generate a time map information according to the video delay, the audio delay and the wireless communications delay; and transmitting the time map information from the video device to the wireless audio device for AV synchronization between the video device and the wireless audio device.

Abstract: The invention provides method and system for improving efficiency of protecting multi-content process. The system may cooperate with a memory, and may comprise one or more hardware IPs (intellectual properties) for content processing, one of the one or more IPs may be associated with multiple access identities. The memory may comprise multiple different ranges, each range may register an access of one of the multiple access identities as a permissible access. The method may comprise: selecting one of the access identities for processing a first content, and using the selected access identity when said IP accesses the memory during processing of the first content; selecting a different one of the access identities for processing a second content, and using the selected different access identity when said IP accesses the memory during processing of the second content.

Abstract: The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.

Abstract: The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.

Abstract: A key protecting device is provided. The key protecting device includes a crypto engine, a ROM and a processor. The ROM stores a chip unique key, and is exclusively accessible to the crypto engine. The processor receives a first salt value and a first encrypted key from a non-volatile memory. The crypto engine receives the chip unique key from the ROM, receives the first salt value and the first encrypted key from the processor, and generates a first key according to the first salt value, the chip unique key and the first encrypted key.

Abstract: A key protecting device is provided. The key protecting device includes a crypto engine, a ROM and a processor. The ROM stores a chip unique key, and is exclusively accessible to the crypto engine. The processor receives a first salt value and a first encrypted key from a non-volatile memory. The crypto engine receives the chip unique key from the ROM, receives the first salt value and the first encrypted key from the processor, and generates a first key according to the first salt value, the chip unique key and the first encrypted key.

Abstract: The object of the present invention is to provide a clock synthesizer IC which can produce clock signals with much lower radiated EMI.

Abstract: A waveform shaping circuit includes an input terminal, an output terminal, and a plurality of cascaded circuit stages. Each of the cascaded circuit stages includes a delay circuit having an output and an input, a current source, and a switch circuit, connected electrically to the output of the delay circuit and controlled by the delay circuit, for connecting electrically the current source to the output terminal. The input of the delay circuit of a first one of the circuit stages is connected electrically to the input terminal. The input of the delay circuit of remaining ones of the circuit stages is connected electrically to the output of the delay circuit of an immediately preceding one of the circuit stages. The delay circuits have equal delay times. The total delay time provided by the delay circuits of the circuit stages is equal to or is a multiple of half a bit time of the fundamental data rate.