Patents by Inventor Chun-Ming Chou

Chun-Ming Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250181523
    Abstract: The invention provides method and system for improving efficiency of protecting multi-content process. The system may cooperate with a memory, and may comprise one or more hardware IPs (intellectual properties) for content processing, one of the one or more IPs may be associated with multiple access identities. The memory may comprise multiple different ranges, each range may register an access of one of the multiple access identities as a permissible access. The method may comprise: selecting one of the access identities for processing a first content, and using the selected access identity when said IP accesses the memory during processing of the first content; selecting a different one of the access identities for processing a second content, and using the selected different access identity when said IP accesses the memory during processing of the second content.
    Type: Application
    Filed: February 7, 2025
    Publication date: June 5, 2025
    Inventors: Yu-Tien CHANG, Lin-Ming HSU, Chun-Ming CHOU
  • Patent number: 12253960
    Abstract: The invention provides method and system for improving efficiency of protecting multi-content process. The system may cooperate with a memory, and may comprise one or more hardware IPs (intellectual properties) for content processing, one of the one or more IPs may be associated with multiple access identities. The memory may comprise multiple different ranges, each range may register an access of one of the multiple access identities as a permissible access. The method may comprise: selecting one of the access identities for processing a first content, and using the selected access identity when said IP accesses the memory during processing of the first content; selecting a different one of the access identities for processing a second content, and using the selected different access identity when said IP accesses the memory during processing of the second content.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: March 18, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yu-Tien Chang, Lin-Ming Hsu, Chun-Ming Chou
  • Patent number: 12177595
    Abstract: A video device, a wireless audio device and a method for performing audio and video (AV) synchronization between the video device and the wireless audio device are provided. The method includes: utilizing a controller of the video device to determine a video delay of the video device; utilizing the controller to determine an audio delay of the video device; utilizing the controller to receive information of a communications quality of the wireless audio device from the wireless audio device, to determine a wireless communications delay between the video device and the wireless audio device according to the communications quality; utilizing the controller to generate a time map information according to the video delay, the audio delay and the wireless communications delay; and transmitting the time map information from the video device to the wireless audio device for AV synchronization between the video device and the wireless audio device.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: December 24, 2024
    Assignee: MEDIATEK INC.
    Inventors: Chun-Ming Chou, Shaoyong Duan, Kuo-Ho Tsai, Chung-Yu Lin
  • Publication number: 20240201874
    Abstract: A system on chip includes a dynamic random access memory (DRAM) controller, a secure range (SR) permission checker, a plurality of intellectual property (IP) cores. The DRAM controller includes a SR table configured to store a start address, an end address, and enabled registers of each SR and an access identification (AID) permission table configured to store access permissions of SRs of each AID. The SR permission checker is embedded in the DRAM controller or a bus and linked to the SR table and the AID permission table, and configured to check the access permissions of the SRs according to the AID permission table. The plurality of IP cores linked to the DRAM controller, and comprising a translation lookaside buffer (TLB) comprising an input-output memory management unit (IOMMU) table or an input-output memory protection unit (IOMPU) table to store SR information.
    Type: Application
    Filed: December 14, 2023
    Publication date: June 20, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Tien Chang, Lin-Ming Hsu, Chun-Ming Chou
  • Publication number: 20240040065
    Abstract: A video device, a wireless audio device and a method for performing audio and video (AV) synchronization between the video device and the wireless audio device are provided. The method includes: utilizing a controller of the video device to determine a video delay of the video device; utilizing the controller to determine an audio delay of the video device; utilizing the controller to receive information of a communications quality of the wireless audio device from the wireless audio device, to determine a wireless communications delay between the video device and the wireless audio device according to the communications quality; utilizing the controller to generate a time map information according to the video delay, the audio delay and the wireless communications delay; and transmitting the time map information from the video device to the wireless audio device for AV synchronization between the video device and the wireless audio device.
    Type: Application
    Filed: July 27, 2023
    Publication date: February 1, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chun-Ming Chou, Shaoyong Duan, Kuo-Ho Tsai, Chung-Yu Lin
  • Publication number: 20220035751
    Abstract: The invention provides method and system for improving efficiency of protecting multi-content process. The system may cooperate with a memory, and may comprise one or more hardware IPs (intellectual properties) for content processing, one of the one or more IPs may be associated with multiple access identities. The memory may comprise multiple different ranges, each range may register an access of one of the multiple access identities as a permissible access. The method may comprise: selecting one of the access identities for processing a first content, and using the selected access identity when said IP accesses the memory during processing of the first content; selecting a different one of the access identities for processing a second content, and using the selected different access identity when said IP accesses the memory during processing of the second content.
    Type: Application
    Filed: April 8, 2021
    Publication date: February 3, 2022
    Inventors: Yu-Tien CHANG, Lin-Ming HSU, Chun-Ming CHOU
  • Patent number: 10673427
    Abstract: The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: June 2, 2020
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Chun-Ming Chou, Ming-Hui Tung, Chien-Wen Chen, Tsung-Yen Liu
  • Publication number: 20190296732
    Abstract: The present invention discloses a circuit capable of protecting low-voltage devices. The circuit includes: a pin configured to receive a signal of an external device; a control voltage generating circuit configured to generate a first control voltage according to a supply voltage to turn on a protected device when the supply voltage is at a high level, and generate a second control voltage according to a voltage of the pin to turn on the protected device when the supply voltage is at a low level; and the protected device configured to be turned on according to one of the first and the second control voltages and thereby electrically couple the pin with an internal circuit, in which the difference between the voltage of the pin and each of the first and the second control voltages is within a maximum withstanding voltage of the protected device.
    Type: Application
    Filed: March 19, 2019
    Publication date: September 26, 2019
    Inventors: CHUN-MING CHOU, MING-HUI TUNG, CHIEN-WEN CHEN, TSUNG-YEN LIU
  • Patent number: 10009174
    Abstract: A key protecting device is provided. The key protecting device includes a crypto engine, a ROM and a processor. The ROM stores a chip unique key, and is exclusively accessible to the crypto engine. The processor receives a first salt value and a first encrypted key from a non-volatile memory. The crypto engine receives the chip unique key from the ROM, receives the first salt value and the first encrypted key from the processor, and generates a first key according to the first salt value, the chip unique key and the first encrypted key.
    Type: Grant
    Filed: July 21, 2015
    Date of Patent: June 26, 2018
    Assignee: MStar Semiconductor, Inc.
    Inventor: Chun-Ming Chou
  • Publication number: 20160344545
    Abstract: A key protecting device is provided. The key protecting device includes a crypto engine, a ROM and a processor. The ROM stores a chip unique key, and is exclusively accessible to the crypto engine. The processor receives a first salt value and a first encrypted key from a non-volatile memory. The crypto engine receives the chip unique key from the ROM, receives the first salt value and the first encrypted key from the processor, and generates a first key according to the first salt value, the chip unique key and the first encrypted key.
    Type: Application
    Filed: July 21, 2015
    Publication date: November 24, 2016
    Inventor: Chun-Ming Chou
  • Patent number: 5710524
    Abstract: The object of the present invention is to provide a clock synthesizer IC which can produce clock signals with much lower radiated EMI.
    Type: Grant
    Filed: April 9, 1996
    Date of Patent: January 20, 1998
    Assignee: Myson Technology, Inc.
    Inventors: Chun-Ming Chou, Jia-Der Hsieh, Tsen-Shau Yang
  • Patent number: 5651029
    Abstract: A waveform shaping circuit includes an input terminal, an output terminal, and a plurality of cascaded circuit stages. Each of the cascaded circuit stages includes a delay circuit having an output and an input, a current source, and a switch circuit, connected electrically to the output of the delay circuit and controlled by the delay circuit, for connecting electrically the current source to the output terminal. The input of the delay circuit of a first one of the circuit stages is connected electrically to the input terminal. The input of the delay circuit of remaining ones of the circuit stages is connected electrically to the output of the delay circuit of an immediately preceding one of the circuit stages. The delay circuits have equal delay times. The total delay time provided by the delay circuits of the circuit stages is equal to or is a multiple of half a bit time of the fundamental data rate.
    Type: Grant
    Filed: May 16, 1995
    Date of Patent: July 22, 1997
    Assignee: Myson Technology, Inc.
    Inventors: Tsen-Shun Yang, Chun-Ming Chou, Wen-Jung Su