Patents by Inventor Chun-Ming Huang

Chun-Ming Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110138248
    Abstract: A method for arranging memories of a low-complexity low-density parity-check (LDPC) decoder and a low-complexity LDPC decoder using the same method are provided. The main idea of the method for arranging memories of a low-complexity LDPC decoder is to merge at least one or two small-capacity memory blocks into one memory group, so that the memory area can be reduced and the power consumption in reading or writing data is lowered. Besides, as the merged memory group shares the same address line in reading or writing data, at least one delay unit is used to adjust the reading or writing order and thereby ensure data validity. A low-complexity LDPC decoder using the disclosed method can meet the demands of high processing rate and low power consumption.
    Type: Application
    Filed: February 18, 2010
    Publication date: June 9, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chien-Ming Wu, Ming-Der Shieh, Chun-Ming Huang, Chi-Sheng Lin, Shih-Hao Fang, Shing-Chung Tang
  • Publication number: 20110123262
    Abstract: An inflation nozzle includes a first part having a first threaded passage defined centrally therethrough and a connection ring is threadedly connected to a first end of the first part. An insertion is formed on a second end of the first part and is engaged with a first chamber of a central member which is received in a second part. The central member is connected with a tire pump. The first passage is sized to be connected with a French valve and the connection ring is sized to be connected with an American valve.
    Type: Application
    Filed: November 24, 2009
    Publication date: May 26, 2011
    Inventors: Ying-Che HUANG, Chun-Ming Huang
  • Publication number: 20110108133
    Abstract: An inflation nozzle of a tire pump having air sealing function includes a casing, a valve plug seat, a valve plug and a locking ring. The valve plug seat includes a head portion at one end and a groove defined annularly on an outer periphery thereof. A sealing ring is engaged with the groove. The sealing ring protrudes radially beyond the head portion so as to be in contact with an inner circular periphery of the casing when the valve plug is installed in the valve plug seat and the casing is connected with a locking ring. The sealing ring ensures that no leakage between the valve plug seat and the casing.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 12, 2011
    Inventors: Ying-Che HUANG, Chun-Ming Huang
  • Publication number: 20110096506
    Abstract: A multi-layer system-on-chip (SoC) module structure is provided. The multi-layer SoC module structure includes at least two circuit board module layers and at least one connector module layer. Each connector module layer is sandwiched between and thus electrically connects two circuit board module layers such that the SoC module structure is formed by stacking. Each circuit board module layer is composed of at least one circuit board module while each connector module layer is composed of at least one connector module. Hence, the SoC module structure can be manufactured as a three-dimensional structure, thus allowing highly flexible connections within the SoC module structure.
    Type: Application
    Filed: January 12, 2010
    Publication date: April 28, 2011
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chin-Long Wey, Chi-Shi Chen, Chi-Sheng Lin
  • Publication number: 20100330741
    Abstract: A fabrication method for a system-on-chip (SoC) module is provided. The fabrication method includes the steps of providing at least two SoC sub-modules and connecting the SoC sub-modules. The SoC sub-modules are electrically connected with each other by connection interfaces of the SoC sub-modules so as to form the SoC module. As the SoC sub-modules have been verified in advance, the time required for verifying the resulting SoC module can be significantly reduced. As for application-specific SoC modules, they are fabricated by connecting with application-specific SoC sub-modules via the appropriate connection interfaces. Thus, the time and costs for developing SoC modules can both be minimized.
    Type: Application
    Filed: September 30, 2009
    Publication date: December 30, 2010
    Applicant: National Chip Implementation Center National Applied Research Laboratories.
    Inventors: Chun-Ming Huang, Chien-Ming Wu, Chih-Chyau Yang, Shih-Lun Chen, Chin-Long Wey, Chi-Shi Chen, Chi-Sheng Lin
  • Patent number: 7859313
    Abstract: An edge-missing detector structure includes a first detector, a first delay unit, a first logic gate, a second detector, a second delay unit, and a second logic gate. After being input separately into the edge-missing detector structure, a first reference signal and a first clock signal are detected by the first and second detectors and then subjected to cycle suppression by the first and second logic gates, respectively, so as to generate a second reference signal and a second clock signal which present a phase difference less than 2?. Moreover, the edge-missing detector structure generates a compensative current corresponding to the number of occurrences of cycle suppression. Thus, a phase-locked loop (PLL) using the edge-missing detector structure can avoid cycle slip problems and achieve fast acquisition of phase lock.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: December 28, 2010
    Assignee: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Ting Hsu Chien, Chi Sheng Lin, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang
  • Publication number: 20100315131
    Abstract: A programmable frequency divider with a full dividing range includes a plurality of cascaded 2/1 frequency dividers. Each of the 2/1 frequency dividers has a first input node, a first output node, a second input node, a second output node and a third input node. The first input node receives a first clock signal divided by the 2/1 frequency divider and outputted as a second clock signal through the first output node. A second logical signal is generated according to the second clock signal, the first clock signal and a first logical signal received from the second input node. The 2/1 frequency divider selectively switches to perform a divide-by-two or divide-by-one operation according to the second logical signal and a first divisor signal received from the third input nodes. The programmable frequency divider provides the full dividing range as the result of utilizing various divisor of the 2/1 frequency divider.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 16, 2010
    Applicant: National Chip Implementaion Center National Applied Research Laboratories
    Inventors: Chi Sheng Lin, Ting-Hsu Chien, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang
  • Publication number: 20100277203
    Abstract: An edge-missing detector structure includes a first detector, a first delay unit, a first logic gate, a second detector, a second delay unit, and a second logic gate. After being input separately into the edge-missing detector structure, a first reference signal and a first clock signal are detected by the first and second detectors and then subjected to cycle suppression by the first and second logic gates, respectively, so as to generate a second reference signal and a second clock signal which present a phase difference less than 2?. Moreover, the edge-missing detector structure generates a compensative current corresponding to the number of occurrences of cycle suppression. Thus, a phase-locked loop (PLL) using the edge-missing detector structure can avoid cycle slip problems and achieve fast acquisition of phase lock.
    Type: Application
    Filed: June 23, 2009
    Publication date: November 4, 2010
    Applicant: National Chip Implementation Center National Applied Research Laboratories
    Inventors: Ting Hsu Chien, Chi Sheng Lin, Chin-Long Wey, Chun-Ming Huang, Ying-Zong Juang
  • Publication number: 20100195188
    Abstract: An electrophoretic display panel includes a transparent substrate, a first electrode, a transparent wall, a plurality of display media, and a plurality of reflective elements. The first electrode is disposed on the transparent substrate. The transparent wall is disposed on the first electrode to define a plurality of micro-cell structures on the first electrode. Each of the micro-cell structures is respectively filled with the display media, and each of the display media has a plurality of colored particles. Each of the reflective elements is disposed on a projection direction of the transparent wall on the transparent substrate. An electrophoretic display apparatus is also provided. The electrophoretic display panel and the electrophoretic display apparatus can be used on condition of various illuminations and have advantages of maintaining display brightness and ensuring low power consumption.
    Type: Application
    Filed: February 3, 2010
    Publication date: August 5, 2010
    Applicant: WINTEK CORPORATION
    Inventors: Chun-Ming Huang, Po-Hsien Wang, Chih-Chang Lai
  • Patent number: 7755177
    Abstract: The present invention discloses a carrier structure of a System-on-Chip (SoC) with a custom interface. The carrier structure includes a substrate, at least one common die, at least one custom interface and a molding compound. The common die and the custom interface are disposed on the substrate. The molding compound is used to package the common die which electrically connects to the substrate and the custom interface respectively. The carrier structure which includes the common die can form a complete SoC by connecting to an expansive die through the custom interface. The carrier structure with the common die which can be tested and certified in advance allows reducing and simplifying the developing procedures of the SoC.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: July 13, 2010
    Assignees: National Applied Research Laboratories
    Inventors: Chin-Long Wey, Chun-Ming Huang, Chien-Ming Wu, Chih-Chyan Yang, Wei-De Chien
  • Patent number: 7683990
    Abstract: An MVA LCD including an active device array substrate, an opposite substrate and a liquid crystal layer is provided. The liquid crystal layer is disposed between the active device array substrate and the opposite substrate, the active device array substrate has pixel units, and the liquid crystal layer above each pixel unit is divided into several domain sets. Each domain set includes at least four domains having the same size, and at least the size of one of the domains in a domain set is different from the size of one of the domains in another domain set.
    Type: Grant
    Filed: December 13, 2006
    Date of Patent: March 23, 2010
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: De-Jiun Li, Ta-Wei Wu, Chun-Ming Huang
  • Publication number: 20100059886
    Abstract: The present invention discloses a carrier structure of a System-on-Chip (SoC) with a custom interface. The carrier structure includes a substrate, at least one common die, at least one custom interface and a molding compound. The common die and the custom interface are disposed on the substrate. The molding compound is used to package the common die which electrically connects to the substrate and the custom interface respectively. The carrier structure which includes the common die can form a complete SoC by connecting to an expansive die through the custom interface. The carrier structure with the common die which can be tested and certified in advance allows reducing and simplifying the developing procedures of the SoC.
    Type: Application
    Filed: November 14, 2008
    Publication date: March 11, 2010
    Inventors: Chin-Long Wey, Chun-Ming Huang, Chien-Ming Wu, Chih-Chyan Yang, Wei-De Chien
  • Publication number: 20100019491
    Abstract: A dispensing head for an air pump includes a sleeve connected to the air pump and a chamber is defined in an end of the sleeve. The end having the chamber of the sleeve is received in a housing and a mount piece is securely received in the housing. A first seal ring is mounted to the mount piece and in contact with an inner periphery of the chamber. The mount piece includes a plurality of inner threads defined axially in a central passage in the mount piece, so that the threaded section of a French valve is threadedly connected to the inner threads. A second groove is defined in the mount piece and a second seal ring is engaged with the second groove. The second seal ring is mounted to a neck of the French valve.
    Type: Application
    Filed: July 23, 2008
    Publication date: January 28, 2010
    Inventors: Ying-Che Huang, Chun-Ming Huang
  • Publication number: 20100001034
    Abstract: The present invention relates to a loading device of a pneumatic nail gun that has two corresponding receptacles possessed on the connection device and the magazine base. Two grooves are implemented inside the receptacles and two pivots are implemented on both sides of the magazine with two flanges provided on the two pivots. Through the match of the pivots and the flanges with the receptacles and grooves, a user can rotate the magazine having it positioned slantwise so that the loading port of the magazine will be changed in position from firth on the handle to slantwise, then unlock the fixing ridge on the barrel to load nails into the magazine.
    Type: Application
    Filed: July 7, 2008
    Publication date: January 7, 2010
    Inventor: CHUN-MING HUANG
  • Patent number: 7570329
    Abstract: A LCD panel includes a plurality of pixel elements. Each pixel element includes a first substrate, a second substrate and an optical filter portion. The first substrate and the second substrate are parallel to each other, and a liquid crystal layer is sealed between the first substrate and the second substrate. The first substrate includes a reflective portion, and the second substrate includes a color filter layer. The color filter layer disposed between the first substrate and the second substrate has an opening opposite to the reflective portion. The optical filter portion is disposed in the opening of the color filter layer for providing color compensation in a reflection mode.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: August 4, 2009
    Assignee: Wintek Corporation
    Inventors: Chun-Ming Huang, Wen-Chun Wang, Chin-Pei Hwang, Chien-Chung Chen, Yi-Fan Chen, Chin-Chang Liu, Hen-Ta Kang
  • Patent number: 7571414
    Abstract: A multi-project system-on-chip bench by integrating multiple system-on-chip projects into a chip, which uses a system chip bench, therefore, microprocessor, bus, embedded memory, peripheral component and input/output port is used together by those system-on-chip projects and the average cost of each system-on-chip is thus reduced. Moreover, this invention proposes a design method for multi-project system-on-chip bench, it let the user can effectively manage available data and verification environment in each design process flow hierarchy and in turn an easy-to-use design process flow is thus derived.
    Type: Grant
    Filed: June 15, 2006
    Date of Patent: August 4, 2009
    Assignee: National Chip Implementation Center, National Applied Research Laboratories
    Inventors: Chun-Ming Huang, Chih-Chyau Yang, Jing-Yang Jou, Kuen-Jong Lee, Lan-Da Van
  • Publication number: 20090129907
    Abstract: A weight ballast having a reduced cost of manufacture includes a housing filled with a filling. The housing includes a bottom side, two lateral sides, with the two lateral sides, two terminal sides and bottom side defining a compartment as well as an opening to allow the filling being poured into the housing. The housing further including two lugs extending longitudinally with respect to a longitudinal axis of the housing from the two terminal sides respectively, and with each of the two lugs including a cavity connected to and in communication with the compartment. The filling is a mixture of cement and scum with a predetermined specific weight.
    Type: Application
    Filed: August 8, 2008
    Publication date: May 21, 2009
    Inventor: Chun-Ming Huang
  • Patent number: 7524510
    Abstract: Described herein are methods for the noninvasive immunization of a subject that involve alkyl glycosides. Also described herein are compositions, kits, and devices for the noninvasive immunization of a subject.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: April 28, 2009
    Assignee: The UAB Research Foundation
    Inventors: John Jefferson Arnold, Chun-Ming Huang, Elias Meezan, Dennis J. Pillion, De-Chu C. Tang
  • Publication number: 20090103020
    Abstract: A color filter substrate including a base, a patterned color filter film layer, a common electrode layer and shelters is provided. The patterned color filter film layer is disposed on the base. Here, the patterned color filter film layer has recesses. Additionally, the patterned color filter film layer and the base are covered by the common electrode layer conforming to surfaces of the recesses. Moreover, the recesses and the common electrode layer are covered by the shelters.
    Type: Application
    Filed: October 9, 2008
    Publication date: April 23, 2009
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: De-Jiun Li, Chun-Ming Huang, Yen-Ju Chen, Der-Chun Wu
  • Publication number: 20090104546
    Abstract: A fabricating method of a color filter substrate includes following steps. First, a base is provided. A patterned color filter film layer having a plurality of recesses is then formed on the base. Next, a common electrode layer is formed on the patterned color filter film layer and the base. Here, the common electrode layer conforms to surfaces of the recesses. Thereafter, a plurality of shelters are formed on the common electrode layer and correspond to the recesses.
    Type: Application
    Filed: October 9, 2008
    Publication date: April 23, 2009
    Applicant: CHUNGHWA PICTURE TUBES, LTD.
    Inventors: De-Jiun Li, Chun-Ming Huang, Yen-Ju Chen, Der-Chun Wu