Patents by Inventor Chun-Ming Lung

Chun-Ming Lung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128364
    Abstract: A semiconductor device includes a fin structure, a metal gate stack, a barrier structure and an epitaxial source/drain region. The fin structure is over a substrate. The metal gate stack is across the fin structure. The barrier structure is on opposite sides of the metal gate stack. The barrier structure comprises one or more passivation layers and one or more barrier layers, and the one or more passivation layers have a material different from a material of the one or more barrier layers. The epitaxial source/drain region is over the barrier structure.
    Type: Application
    Filed: March 27, 2023
    Publication date: April 18, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Ming LUNG, Chung-Ting KO, Ting-Hsiang CHANG, Sung-En LIN, Chi On CHUI
  • Patent number: 11929254
    Abstract: A method includes depositing a hard mask over a target layer. Depositing the hard mask includes depositing a first hard mask layer having a first density and depositing a second hard mask layer over the first hard mask layer, the second hard mask layer having a second density greater than the first density. The method further includes forming a plurality of mandrels over the hard mask; depositing a spacer layer over and along sidewalls of the plurality of mandrels; patterning the spacer layer to provide a plurality of spacers on the sidewalls of the plurality of mandrels; after patterning the spacer layer, removing the plurality of mandrels; transferring a patterning the plurality of spacers to the hard mask; and patterning the target layer using the hard mask as a mask.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Ming Lung, ChunYao Wang
  • Publication number: 20230335406
    Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.
    Type: Application
    Filed: June 26, 2023
    Publication date: October 19, 2023
    Inventors: Wen-Ju Chen, Chung-Ting Ko, Wan-Chen Hsieh, Chun-Ming Lung, Tai-Chun Huang, Chi On Chui
  • Patent number: 11728173
    Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: August 15, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Ju Chen, Chung-Ting Ko, Wan-Chen Hsieh, Chun-Ming Lung, Tai-Chun Huang, Chi On Chui
  • Publication number: 20230108424
    Abstract: A method includes depositing a hard mask over a target layer. Depositing the hard mask includes depositing a first hard mask layer having a first density and depositing a second hard mask layer over the first hard mask layer, the second hard mask layer having a second density greater than the first density. The method further includes forming a plurality of mandrels over the hard mask; depositing a spacer layer over and along sidewalls of the plurality of mandrels; patterning the spacer layer to provide a plurality of spacers on the sidewalls of the plurality of mandrels; after patterning the spacer layer, removing the plurality of mandrels; transferring a patterning the plurality of spacers to the hard mask; and patterning the target layer using the hard mask as a mask.
    Type: Application
    Filed: December 1, 2022
    Publication date: April 6, 2023
    Inventors: Chun-Ming Lung, ChunYao Wang
  • Publication number: 20230040843
    Abstract: A method of forming a semiconductor device includes: forming a fin structure protruding above a substrate, where the fin structure includes a fin and a layer stack over the fin, the layer stack comprising alternating layers of a first semiconductor material and a second semiconductor material; forming a first dummy gate structure and a second dummy gate structure over the fin structure; forming an opening in the fin structure between the first dummy gate structure and the second dummy gate structure; converting an upper layer of the fin exposed at a bottom of the opening into a seed layer by performing an implantation process; selectively depositing a dielectric layer over the seed layer at the bottom of the opening; and selectively growing a source/drain material on opposing sidewalls of the second semiconductor material exposed by the opening.
    Type: Application
    Filed: April 8, 2022
    Publication date: February 9, 2023
    Inventors: Chun-Ming Lung, Che-Hao Chang, Zhen-Cheng Wu, Chi On Chui
  • Patent number: 11521856
    Abstract: A method includes depositing a hard mask over a target layer. Depositing the hard mask includes depositing a first hard mask layer having a first density and depositing a second hard mask layer over the first hard mask layer, the second hard mask layer having a second density greater than the first density. The method further includes forming a plurality of mandrels over the hard mask; depositing a spacer layer over and along sidewalls of the plurality of mandrels; patterning the spacer layer to provide a plurality of spacers on the sidewalls of the plurality of mandrels; after patterning the spacer layer, removing the plurality of mandrels; transferring a patterning the plurality of spacers to the hard mask; and patterning the target layer using the hard mask as a mask.
    Type: Grant
    Filed: January 19, 2021
    Date of Patent: December 6, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Ming Lung, ChunYao Wang
  • Publication number: 20220352348
    Abstract: Embodiments provide a treatment process to a dielectric layer deposited in a source/drain recess. The treatment process alters the etch selectivity of the horizontal portions of the dielectric layer to cause the etch rate of the horizontal portions of the dielectric layer to have a lower etch rate than the vertical portions of the dielectric layer. The vertical portions are removed by a wet etch process to leave a portion of the dielectric layer at a bottom of the source/drain recess.
    Type: Application
    Filed: December 22, 2021
    Publication date: November 3, 2022
    Inventors: Chun-Ming Lung, Che-Hao Chang
  • Publication number: 20220102142
    Abstract: A method includes depositing a hard mask over a target layer. Depositing the hard mask includes depositing a first hard mask layer having a first density and depositing a second hard mask layer over the first hard mask layer, the second hard mask layer having a second density greater than the first density. The method further includes forming a plurality of mandrels over the hard mask; depositing a spacer layer over and along sidewalls of the plurality of mandrels; patterning the spacer layer to provide a plurality of spacers on the sidewalls of the plurality of mandrels; after patterning the spacer layer, removing the plurality of mandrels; transferring a patterning the plurality of spacers to the hard mask; and patterning the target layer using the hard mask as a mask.
    Type: Application
    Filed: January 19, 2021
    Publication date: March 31, 2022
    Inventors: Chun-Ming Lung, ChunYao Wang
  • Publication number: 20220102152
    Abstract: A method includes forming a semiconductor layer over a substrate; etching a portion of the semiconductor layer to form a first recess and a second recess; forming a first masking layer over the semiconductor layer; performing a first thermal treatment on the first masking layer, the first thermal treatment densifying the first masking layer; etching the first masking layer to expose the first recess; forming a first semiconductor material in the first recess; and removing the first masking layer.
    Type: Application
    Filed: September 30, 2020
    Publication date: March 31, 2022
    Inventors: Wen-Ju Chen, Chung-Ting Ko, Wan-Chen Hsieh, Chun-Ming Lung, Tai-Chun Huang, Chi On Chui