Patents by Inventor Chun Moon

Chun Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050120976
    Abstract: Disclosed is a system and method for producing a sound having a certain frequency range to maintain laying hens in more stable and comfortable conditions. The system comprises a basic wave generator for generating a pair of first basic waves having the same phase and a pair of second basic waves having opposite phases, a relaxation wave generator for generating a pair of relaxation waves by combining the pair of first basic waves and the pair of second basic waves with time, a modulator for generating a pair of relaxation sounds by modulating the pair of relaxation waves with a sound wave having an audible frequency, and an audio output unit composed of two left and right parts such that stereo sound is outputted, for receiving the pair of relaxation sounds and outputting the pair of relaxation sounds to the left and right parts, respectively.
    Type: Application
    Filed: December 7, 2004
    Publication date: June 9, 2005
    Applicants: REPUBLIC OF KOREA (MANAGEMENT GOVERNMENT OFFICE: RURAL DEV'T ADMINISTRATION) DAEYANG E&C CO., LTD., DAEYANG E&C CO., LTD.
    Inventors: Sang Kim, Sang Lee, Ok Seo, Yong Kim, Chun Moon
  • Publication number: 20050017732
    Abstract: An apparatus for detecting an arc fault.
    Type: Application
    Filed: June 4, 2004
    Publication date: January 27, 2005
    Inventors: Cheon-Youn Kim, Dong-Seb Kim, Joung-Myoung Ko, Je-Chun Moon
  • Publication number: 20040095695
    Abstract: An apparatus for detecting an arc fault.
    Type: Application
    Filed: August 14, 2003
    Publication date: May 20, 2004
    Inventors: Cheon-Youn Kim, Dong Seb Kim, Joung Myoung Ko, Je Chun Moon
  • Patent number: 6566739
    Abstract: The present invention discloses a method of manufacturing a dual chip package using tape wiring boards. According to the method, an upper tape wiring board, a lower tape wiring board, and a lead frame are prepared. Each of the tape wiring boards includes a polymeric tape having windows patterned therein, metal patterns formed on the lower surface of the polymeric tape at either sides of said windows. The metal patterns have pad connection portions exposed through the window. Lead connection portions extend outwardly from said polymeric tape. An adhesive layer is formed on the lower surface of the tape. A lower chip is attached to a lower surface of the die pad. The lower chip includes an active surface having a plurality of electrode pads at approximately the center and a rear surface attached to the lower surface of the die pad. An upper chip is attached to an upper surface of the die pad.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: May 20, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Chun Moon
  • Publication number: 20020130399
    Abstract: The present invention discloses a method of manufacturing a dual chip package using tape wiring boards. According to the method, an upper tape wiring board, a lower tape wiring board, and a lead frame are prepared. Each of the tape wiring boards includes a polymeric tape having windows patterned therein, metal patterns formed on the lower surface of the polymeric tape at either sides of said windows. The metal patterns have pad connection portions exposed through the window. Lead connection portions extend outwardly from said polymeric tape. An adhesive layer is formed on the lower surface of the tape. A lower chip is attached to a lower surface of the die pad. The lower chip includes an active surface having a plurality of electrode pads at approximately the center and a rear surface attached to the lower surface of the die pad. An upper chip is attached to an upper surface of the die pad.
    Type: Application
    Filed: May 10, 2002
    Publication date: September 19, 2002
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Sung-Chun Moon
  • Patent number: 6423580
    Abstract: The present invention discloses a method of manufacturing a dual chip package using tape wiring boards. According to the method, an upper tape wiring board, a lower tape wiring board, and a lead frame are prepared. Each of the tape wiring boards includes a polymeric tape having windows patterned therein, metal patterns formed on the lower surface of the polymeric tape at either sides of said windows. The metal patterns have pad connection portions exposed through the window. Lead connection portions extend outwardly from said polymeric tape. An adhesive layer is formed on the lower surface of the tape. A lower chip is attached to a lower surface of the die pad. The lower chip includes an active surface having a plurality of electrode pads at approximately the center and a rear surface attached to the lower surface of the die pad. An upper chip is attached to an upper surface of the die pad.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: July 23, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Chun Moon
  • Publication number: 20020019073
    Abstract: The present invention discloses a method of manufacturing a dual chip package using tape wiring boards. According to the method, an upper tape wiring board, a lower tape wiring board, and a lead frame are prepared. Each of the tape wiring boards includes a polymeric tape having windows patterned therein, metal patterns formed on the lower surface of the polymeric tape at either sides of said windows. The metal patterns have pad connection portions exposed through the window. Lead connection portions extend outwardly from said polymeric tape. An adhesive layer is formed on the lower surface of the tape. A lower chip is attached to a lower surface of the die pad. The lower chip includes an active surface having a plurality of electrode pads at approximately the center and a rear surface attached to the lower surface of the die pad. An upper chip is attached to an upper surface of the die pad.
    Type: Application
    Filed: July 30, 2001
    Publication date: February 14, 2002
    Applicant: Samsung Electronics Co. Ltd
    Inventor: Sung-Chun Moon