Abstract: The present invention provides a protection circuit applied to a battery module, which includes a self-control protector, a switch element and a voltage clamping loop; the self-control protector includes a fuse unit and a heater; when the switch element receives a control signal, the switch element will be turned on; when the switch element is turned on, the voltage clamping loop provides a clamp voltage to clamp a working current passing through the self-control protector within a current range where the fuse unit can be blown; and as such, the fuse unit of the self-control protector will be blown by the working current heating the heater.

Abstract: A method for motion prediction includes receiving spatial information output by a radio-wave sensor, wherein the spatial information includes position and velocity of at least one point; receiving an image captured by a camera; tracking at least one object based on the spatial information and the image to obtain a consolidated tracking result; predicting a motion trajectory of the at least one object based on the consolidated tracking result to obtain a prediction result; and controlling the camera according to the prediction result.

Abstract: A processor or control circuit of an apparatus receives data of an image based on sensing by one or more image sensors. The processor or control circuit also detects a region of interest (ROI) in the image. The processor or control circuit then adaptively controls a light projector with respect to projecting light toward the ROI.

Abstract: Various examples with respect to adaptive infrared (IR) projection control for depth estimation in computer vision are described. A processor or control circuit of an apparatus receives data of an image based on sensing by one or more image sensors. The processor or control circuit also detects a region of interest (ROI) in the image. The processor or control circuit then adaptively controls a light projector with respect to projecting light toward the ROI.

Abstract: A highlight processing method includes: obtaining a frame sequence that includes frames each having image contents associated with at least one object, wherein object pose estimation is performed upon each frame of the frame sequence to generate an object pose estimation result of each frame, and further includes determining at least one of a start point and an end point of a highlight interval, wherein comparison of object pose estimation results of different frames is involved in determination of at least one of the start point and the end point of the highlight interval.

Abstract: A highlight processing method includes: obtaining a frame sequence that includes frames each having image contents associated with at least one object, wherein object pose estimation is performed upon each frame of the frame sequence to generate an object pose estimation result of each frame, and further includes determining at least one of a start point and an end point of a highlight interval, wherein comparison of object pose estimation results of different frames is involved in determination of at least one of the start point and the end point of the highlight interval.

Abstract: Various examples with respect to adaptive infrared (IR) projection control for depth estimation in computer vision are described. A processor or control circuit of an apparatus receives data of an image based on sensing by one or more image sensors. The processor or control circuit also detects a region of interest (ROI) in the image. The processor or control circuit then adaptively controls a light projector with respect to projecting light toward the ROI.

Abstract: A transmission interface includes a first pin, a second pin, a conversion unit, and a decoding unit. The conversion unit receives a serial input data stream via the first pin and receives a serial clock via the second pin. The conversion unit converts the serial input data stream to parallel input data and converts the serial clock to a parallel clock. The serial input data stream has a full swing form. The decoding unit receives and decodes the parallel input data and generates an input data signal according to the decoded parallel input data.

Abstract: A transmission interface includes a first pin, a second pin, a conversion unit, and a decoding unit. The conversion unit receives a serial input data stream via the first pin and receives a serial clock via the second pin. The conversion unit converts the serial input data stream to parallel input data and converts the serial clock to a parallel clock. The serial input data stream has a full swing form. The decoding unit receives and decodes the parallel input data and generates an input data signal according to the decoded parallel input data.

Abstract: A transmission interface includes a first pin, a second pin, a conversion unit, and a decoding unit. The conversion unit receives a serial input data stream via the first pin and receives a serial clock via the second pin. The conversion unit converts the serial input data stream to parallel input data and converts the serial clock to a parallel clock. The serial input data stream has a full swing form. The decoding unit receives and decodes the parallel input data and generates an input data signal according to the decoded parallel input data.

Abstract: A transmission interface includes a first pin, a second pin, a conversion unit, and a decoding unit. The conversion unit receives a serial input data stream via the first pin and receives a serial clock via the second pin. The conversion unit converts the serial input data stream to parallel input data and converts the serial clock to a parallel clock. The serial input data stream has a full swing form. The decoding unit receives and decodes the parallel input data and generates an input data signal according to the decoded parallel input data.

Abstract: The speed of the network address translation translated with software is generally slower than the speed of transmitting packet in the network, so that the data stored in memory is affected. In this invention, the network address translation is translated by hardware, and a plurality of comparing engines is employed to accelerate the translating speed. Therefore, even in the worst case scenario, the time needed for translating the network address is shorter than the time needed for storing the packet into memory, so that the operation of the network address translation is assured not to affect the data transmission in the network.

Abstract: A method and an apparatus in a computer system for connecting buses with different clock frequencies are provided. The method comprises receiving a request transmitted from a master to a slave. If the clock frequency of the master is lower than that of the slave such that the slave sees more requests than the master does, redundant cycles of the request signal are masked lest the slave repeatedly receive the request. The request is then transferred to the slave. If the clock frequency of the master is higher than that of the slave such that the slave cannot receive the request in time, then the request signal is lengthened so that the request signal is synchronized with the clock cycles of the slave. The output data responded from the slave is then transferred to the master.

Abstract: A method and an apparatus in a computer system for connecting buses with different clock frequencies are provided. The method comprises receiving a request transmitted from a master to a slave. If the clock frequency of the master is lower than that of the slave such that the slave sees more requests than the master does, redundant cycles of the request signal are masked lest the slave repeatedly receive the request. The request is then transferred to the slave. If the clock frequency of the master is higher than that of the slave such that the slave cannot receive the request in time, then the request signal is lengthened so that the request signal is synchronized with the clock cycles of the slave. The output data responded from the slave is then transferred to the master.

Abstract: The present invention is to provide a snapping mechanism mounted in a compartment of a case of a PC comprising a second hook of a pivotal member installed within the compartment for being pushed by a second protrusion of an electronic device, while mounting the electronic device into the compartment, the pivotal member moves along a trough provided thereon from one position to another position and enables an elastic member of the snapping mechanism to pivot the pivotal member like a lever to urge a first hook thereof against a first protrusion of the electronic device with the elastic member compressed and generate a strong snapping force to fasten the electronic device within the compartment.

Abstract: The speed of the network address translation translated with software is generally slower than the speed of transmitting packet in the network, so that the data stored in memory is affected. In this invention, the network address translation is translated by hardware, and a plurality of comparing engines is employed to accelerate the translating speed. Therefore, even in the worst case scenario, the time needed for translating the network address is shorter than the time needed for storing the packet into memory, so that the operation of the network address translation is assured not to affect the data transmission in the network.