Abstract: A magnetic element includes a first magnetic core, a coil and a second magnetic core. The first magnetic core is made of a ferrite material, and a magnetic permeability of the first magnetic core is higher than 700. The coil is installed on the first magnetic core. The second magnetic core is formed by molding an alloy composition. In addition, the coil and at least a portion of the first magnetic core are covered by the second magnetic core.

Abstract: A printed circuit board assembly including a substrate having a first surface and a second surface opposite to the first surface, wherein the substrate has a first thickness; a cavity disposed within a chip module mounting region of the substrate on the first surface that caves in towards the second surface, wherein the chip module mounting region of the substrate has a second thickness, wherein the second thickness is smaller than the first thickness; a plurality of bonding pads in the cavity; and a chip module mounted in the cavity and electrically connected to the substrate through the plurality of bonding pads.

Abstract: A wireless communication system using wireless LAN channels for wireless communication is disclosed, comprising: master access point, slave access points, and computing unit. First, the master access point creates a collision record table and a usage time record table. After that, the master access point updates the collision record table and usage time record table based on the usage information, and transmits the collision record table and usage time record table to the slave access points. The computing unit generates the channel collision probability through the number of collisions, and calculates the usage weight of the dynamic frequency selection channel through the channel collision probability. Finally, the wireless communication system automatically selects the wireless LAN channels of the master access point and the slave access points according to the usage weight and usage time record table. As such, the wireless communication system has high efficiency and low delay.

Abstract: A wireless communication system using wireless LAN channels for wireless communication is disclosed, comprising: master access point, slave access points, and computing unit. First, the master access point creates a collision record table and a usage time record table. After that, the master access point updates the collision record table and usage time record table based on the usage information, and transmits the collision record table and usage time record table to the slave access points. The computing unit generates the channel collision probability through the number of collisions, and calculates the usage weight of the dynamic frequency selection channel through the channel collision probability. Finally, the wireless communication system automatically selects the wireless LAN channels of the master access point and the slave access points according to the usage weight and usage time record table. As such, the wireless communication system has high efficiency and low delay.

Abstract: A microelectronic system includes a base and a semiconductor package mounted on the base. The base includes an internal conductive layer and a build-up layer on the internal conductive layer. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P, and the power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.

Abstract: A microelectronic system includes a base and a semiconductor package mounted on the base. The base includes an internal conductive layer and a build-up layer on the internal conductive layer. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P, and the power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.

Abstract: A microelectronic system includes a printed circuit board and a semiconductor package mounted on the printed circuit board. The printed circuit board includes a laminated core having an internal conductive layer and a build-up layer. The build-up layer includes a top conductive layer. Microvias are disposed in the build-up layer to connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.

Abstract: A microelectronic system includes a printed circuit board and a semiconductor package mounted on the printed circuit board. The printed circuit board includes a laminated core having an internal conductive layer and a build-up layer. The build-up layer includes a top conductive layer. Microvias are disposed in the build-up layer to connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.

Abstract: A printed circuit board includes a laminated core including at least an internal conductive layer, and a build-up layer on the laminated core. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area that is comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.

Abstract: A printed circuit board includes a laminated core including at least an internal conductive layer, and a build-up layer on the laminated core. The build-up layer includes a top conductive layer. A plurality of microvias is disposed in the build-up layer to electrically connect the top conductive layer with the internal conductive layer. A power/ground ball pad array is disposed in the top conductive layer. The power/ground ball pad array includes power ball pads and ground ball pads arranged in an array with a fixed ball pad pitch P. The power/ground ball pad array includes a 4-ball pad unit area that is comprised of only one ground ball pad and three power ball pads, or comprised of only one power ball pad and three ground ball pads. The 4-ball pad unit area has a rectangular shape and a dimension of about 2P×2P.

Abstract: A transformer includes a bobbin, at least one primary winding coil, at least one secondary winding coil, and a magnetic core assembly. The bobbin includes a main body, plural extension structures, and plural pin groups. The main body includes a channel, plural winding sections, a first connecting seat, and a second connecting seat. The plural extension structures are connected with the first connecting seat and the second connecting seat, respectively. In addition, each of the plural extension structures has a notch and a stepped structure, and the stepped structure comprises plural stepped parts. Each of the primary winding coil and the secondary winding coil includes plural outlet terminals. The plural outlet terminals of the secondary winding coil are respectively disposed on the plural stepped parts of the stepped structure and fixed on the pin group which is disposed on one of the extension structures.

Abstract: A transformer includes a bobbin, at least one primary winding coil, at least one secondary winding coil, and a magnetic core assembly. The bobbin includes a main body, plural extension structures, and plural pin groups. The main body includes a channel, plural winding sections, a first connecting seat, and a second connecting seat. The plural extension structures are connected with the first connecting seat and the second connecting seat, respectively. In addition, each of the plural extension structures has a notch and a stepped structure, and the stepped structure comprises plural stepped parts. Each of the primary winding coil and the secondary winding coil includes plural outlet terminals. The plural outlet terminals of the secondary winding coil are respectively disposed on the plural stepped parts of the stepped structure and fixed on the pin group which is disposed on one of the extension structures.

Abstract: Statistical timing analysis methods for circuits having latches and feedback loops are described wherein the circuit yield, and/or the critical cycle mean (the largest cycle mean among all loops in the circuit), may be iteratively calculated with high speed and accuracy, thereby allowing their ready usage in the analysis and validation of proposed circuit designs.

Abstract: A magnetic element includes a bobbin, a first winding assembly, a second winding assembly and a magnetic core assembly. The bobbin includes a winding part, a first extension part and a second extension part. The first extension part and the second extension part are separated from each other by the winding part. The first winding assembly is wound around the winding part of the bobbin, and includes plural first terminals. The second winding assembly is wound around the winding part of the bobbin, and includes plural second terminals. The magnetic core assembly includes a first window and a second window. The first extension part is protruded out of the first window. The second extension part is protruded out of the second window. At least one of the first terminals and at least one of the second terminals are simultaneously fixed on the first extension part and/or the second extension part.

Abstract: A transformer set includes a first bobbin piece, a second bobbin piece, a third bobbin piece, a fourth bobbin piece and a magnetic core assembly. The second bobbin piece has a first pin and a second pin. A first terminal of a first secondary winding coil is fixed on the first pin, then the first secondary winding coil is successively wound on the second bobbin piece and returned back, and a second terminal of the first secondary winding coil is fixed on the second pin. The fourth bobbin piece has a third pin and a fourth pin. A first terminal of a second secondary winding coil is fixed on the third pin, then the second secondary winding coil is successively wound on the fourth bobbin piece and returned back, and a second terminal of the second secondary winding coil is fixed on the fourth pin.

Abstract: A transformer set includes a first bobbin piece, a second bobbin piece, a third bobbin piece, a fourth bobbin piece and a magnetic core assembly. The second bobbin piece has a first pin and a second pin. A first terminal of a first secondary winding coil is fixed on the first pin, then the first secondary winding coil is successively wound on the second bobbin piece and returned back, and a second terminal of the first secondary winding coil is fixed on the second pin. The fourth bobbin piece has a third pin and a fourth pin. A first terminal of a second secondary winding coil is fixed on the third pin, then the second secondary winding coil is successively wound on the fourth bobbin piece and returned back, and a second terminal of the second secondary winding coil is fixed on the fourth pin.

Abstract: A magnetic element includes a bobbin, a first winding assembly, a second winding assembly and a magnetic core assembly. The bobbin includes a winding part, a first extension part and a second extension part. The first extension part and the second extension part are separated from each other by the winding part. The first winding assembly is wound around the winding part of the bobbin, and includes plural first terminals. The second winding assembly is wound around the winding part of the bobbin, and includes plural second terminals. The magnetic core assembly includes a first window and a second window. The first extension part is protruded out of the first window. The second extension part is protruded out of the second window. At least one of the first terminals and at least one of the second terminals are simultaneously fixed on the first extension part and/or the second extension part.

Abstract: Statistical timing analysis methods for circuits having latches and feedback loops are described wherein the circuit yield, and/or the critical cycle mean (the largest cycle mean among all loops in the circuit), may be iteratively calculated with high speed and accuracy, thereby allowing their ready usage in the analysis and validation of proposed circuit designs.

Abstract: Statistical timing analysis methods for circuits having latches and feedback loops are described wherein the circuit yield, and/or the critical cycle mean (the largest cycle mean among all loops in the circuit), may be iteratively calculated with high speed and accuracy, thereby allowing their ready usage in the analysis and validation of proposed circuit designs.

Abstract: Statistical timing analysis methods for circuits are described which compensate for circuit elements having correlated timing delays with a high degree of computational efficiency. An quadratic timing model is used to represent each delay element along a circuit path, wherein each element's delay has a first-order relationship to local variations and a second-order relationship to global variations. Propagation of the modeled delays through the circuit is efficiently done via straightforward ADD operations where an input propagates through another element in a circuit path, and via a MAX operation (or an approximation thereof) where two or more inputs merge at an intersection. The inputs to the MAX operator can be tested for gaussianity, and can be processed by the MAX operation (or its approximation) if they are substantially gaussian. Otherwise, they may be stored in a tuple for processing at later points along the circuit path.