Abstract: An example microelectronic device package includes: a multilayer package substrate comprising routing conductors spaced by dielectric material, the multilayer package substrate having a device side surface and an opposing board side surface, and having a recessed portion extending from the device side surface and exposing routing conductors beneath the device side surface of the multilayer package substrate; a semiconductor die mounted to the device side surface of the multilayer package substrate and coupled to the routing conductors; a passive component mounted to the routing conductors exposed in the recessed portion of the multilayer package substrate; and mold compound covering the semiconductor die, the passive component, and a portion of the multilayer package substrate.

Abstract: An electronic device includes a multilevel package substrate with first and second levels, the second level including a first trace layer with a first conductive trace feature, a conductive first via that contacts the first conductive trace feature, and a first dielectric layer, and the first level including a second trace layer with a stair shaped second conductive trace feature, the second conductive trace feature having a first portion with a first thickness, and a second portion, having a second thickness greater than the first thickness.