Patents by Inventor Chun-Shen Liu

Chun-Shen Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240177319
    Abstract: Many unsupervised domain adaptation (UDA) methods have been proposed to bridge the domain gap by utilizing domain invariant information. Most approaches have chosen depth as such information and achieved remarkable successes. Despite their effectiveness, using depth as domain invariant information in UDA tasks may lead to multiple issues, such as excessively high extraction costs and difficulties in achieving a reliable prediction quality. As a result, we introduce Edge Learning based Domain Adaptation (ELDA), a framework which incorporates edge information into its training process to serve as a type of domain invariant information. Our experiments quantitatively and qualitatively demonstrate that the incorporation of edge information is indeed beneficial and effective, and enables ELDA to outperform the contemporary state-of-the-art methods on two commonly adopted benchmarks for semantic segmentation based UDA tasks.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ting-Hsuan Liao, Huang-Ru Liao, Shan-Ya Yang, Jie-En Yao, Li-Yuan Tsao, Hsu-Shen Liu, Bo-Wun Cheng, Chen-Hao Chao, Chia-Che Chang, Yi-Chen Lo, Chun-Yi Lee
  • Patent number: 9830731
    Abstract: A method of a graphics-processing unit (GPU) for tile-based rendering of a display area and a graphics-processing apparatus are provided. The method includes the steps of computing vertex positions of a plurality of vertexes, wherein the first vertex corresponds to a first thread and the second vertex corresponds to a second thread; determining whether a thread merge condition is satisfied; merging the first thread and the second thread to a thread group when determining that the thread merge condition is satisfied; computing vertex varyings of the plurality of vertexes, wherein when the first thread and the second thread are merged to the thread group, a varying of the first vertex and a varying of the second vertex are computed with respect to a program counter.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: November 28, 2017
    Assignee: MEDIATEK INC.
    Inventors: Pei-Kuei Tsung, Sung-Fang Tsai, Ming-Hao Liao, Yang-Yao Lin, Ken-Fu Liang, Chun-Shen Liu
  • Patent number: 9773294
    Abstract: A graphics processing system includes a decision logic and a varying buffer control circuit. The decision logic sets a control signal by checking at least one criterion, wherein the at least one criterion includes a first criterion, and a checking result of the first criterion depends on a size of a primitive. The varying buffer control circuit refers to the control signal to determine whether to store varying variables of the primitive into a varying buffer.
    Type: Grant
    Filed: April 7, 2015
    Date of Patent: September 26, 2017
    Assignee: MEDIATEK INC.
    Inventors: Chun-Shen Liu, Ming-Hao Liao, Hung-Wei Wu
  • Publication number: 20160379336
    Abstract: A method of a graphics-processing unit (GPU) for tile-based rendering of a display area and a graphics-processing apparatus are provided. The method includes the steps of computing vertex positions of a plurality of vertexes, wherein the first vertex corresponds to a first thread and the second vertex corresponds to a second thread; determining whether a thread merge condition is satisfied; merging the first thread and the second thread to a thread group when determining that the thread merge condition is satisfied; computing vertex varyings of the plurality of vertexes, wherein when the first thread and the second thread are merged to the thread group, a varying of the first vertex and a varying of the second vertex are computed with respect to a program counter.
    Type: Application
    Filed: March 18, 2016
    Publication date: December 29, 2016
    Inventors: Pei-Kuei TSUNG, Sung-Fang TSAI, Ming-Hao LIAO, Yang-Yao LIN, Ken-Fu LIANG, Chun-Shen LIU
  • Publication number: 20160005143
    Abstract: A graphics processing system includes a decision logic and a varying buffer control circuit. The decision logic sets a control signal by checking at least one criterion, wherein the at least one criterion includes a first criterion, and a checking result of the first criterion depends on a size of a primitive. The varying buffer control circuit refers to the control signal to determine whether to store varying variables of the primitive into a varying buffer.
    Type: Application
    Filed: April 7, 2015
    Publication date: January 7, 2016
    Inventors: Chun-Shen Liu, Ming-Hao Liao, Hung-Wei Wu