Abstract: A current controller includes impedance elements coupled to form at least one impedance ladder circuit which exhibits a fixed impedance at an input and current divider steps each differing in a current magnitude by a multiple of three with respect to the current magnitude in an adjacent less significant step. Single pole triple throw (SPTT) switchably couple an associated step in the impedance ladder circuit to one of three outputs. Three discrete current sources or sinks are each coupled to a corresponding one of the outputs of each of the SPTT switches. The digital driver is coupled to each control input of each SPTT switch to additively deliver selected ones of the stepped currents from each step of the impedance ladder circuit to a corresponding selected one of the current sources or sinks.

Abstract: A XDSL line card including an allocator for allocating power to the multi-tone modulated communications on each of the subscriber lines, and for selecting control parameters sufficient to effect communications on each of the subscriber lines at a power level proximate to an allocated power level therefore. The line card also includes configurable components coupled to one another to form a transmit path and a receive path to couple to the digital subscriber lines. The configurable components are responsive to the control parameters selected by the allocator to initialize multi-tone communications over each of the plurality of subscriber lines at a power level proximate the allocated power level.

Abstract: A transceiver having shared and discrete components forming a transmit path and a receive path configured to couple to a communication medium for establishing a multi-tone modulated communication channel thereon. The transceiver includes a line driver component on the transmit path. The line driver is configured to respond to a protocol determination and by configuring at least one of a transmit power level and a transmit bandwidth of the multi-tone modulated communication channel on the communication medium. The line driver includes a plurality of pre-amplifiers each exhibiting a combination of transmit power and bandwidth for amplification of a transmit signal modulated with a selected multi-tone modulation protocol. The line driver also includes a single output amplifier having an output coupled to the communication medium and an input switchably coupled to an output of a selected one of the plurality of pre-amplifiers in response to the protocol determination.

Abstract: An amplifier including complementary push and pull components, a bias component and a quiescent current balancer. The complementary push and pull components are serially coupled to one another between an electrical source and sink to generate an output signal at a common output terminal responsive to the input signal source. The bias component is coupled between the input signal source and the complementary push-pull components to bias the input signal to the push component and the input signal to the pull component by discrete amounts which reduce cross-over clipping exhibited in the output signal. The quiescent current balancer is coupled to the output terminal to balance quiescent currents in the push and the pull component at discrete levels which equilibrate amplification levels of the input signal generated by the push component and the pull component in the output signal at the output terminal.

Abstract: An amplifier including complementary push and pull components, a bias component and a quiescent current balancer. The complementary push and pull components are serially coupled to one another between an electrical source and sink to generate an output signal at a common output terminal responsive to the input signal source. The bias component is coupled between the input signal source and the complementary push-pull components to bias the input signal to the push component and the input signal to the pull component by discrete amounts which reduce cross-over clipping exhibited in the output signal. The quiescent current balancer is coupled to the output terminal to balance quiescent currents in the push and the pull component at discrete levels which equilibrate amplification levels of the input signal generated by the push component and the pull component in the output signal at the output terminal.

Abstract: A switch for switchably coupling a signal source to a high impedance load. The switch includes a first bipolar transistor and a floating switch driver. The first bipolar transistor is configured to switchably couple the signal source to the high impedance load responsive to a driver signal applied to a base thereof. The floating switch driver has a control input and an output terminal coupled to the base of the first bi-polar transistor to supply the driver signal thereto. The driver signal comprises a limited forward current during the “On” state of the floating switch driver and a voltage “Voff” not less than the reverse breakdown voltage nor greater than the forward voltage drop across a base-emitter connection of the first bipolar transistor during the “Off” state of the floating switch driver.

Abstract: A XDSL line card including an allocator for allocating power to the multi-tone modulated communications on each of the subscriber lines, and for selecting control parameters sufficient to effect communications on each of the subscriber lines at a power level proximate to an allocated power level therefore. The line card also includes configurable components coupled to one another to form a transmit path and a receive path to couple to the digital subscriber lines. The configurable components are responsive to the control parameters selected by the allocator to initialize multi-tone communications over each of the plurality of subscriber lines at a power level proximate the allocated power level.

Abstract: A line driver for coupling a data transceiver to a transmission line having a load impedance via a transformer with a turns ratio of 1:n includes an input port for receiving an input signal voltage from the data transceiver, an output port for supplying an output signal voltage to the transformer, and an amplifier circuit for amplifying the input signal voltage. The amplifier circuit includes a first output stage, a second output stage coupled to the output port, an output resistor coupled to the first output stage, a feedback path from the first output stage to an input of the amplifier circuit, and a line matching network coupled between the first output stage and the second output stage, for compensating variations in the load impedance, so that a synthesized output impedance of the line driver substantially matches an actual load impedance Z of the transmission line.

Abstract: A method and circuit control a quiescent current of an amplifier including a preamplifier, error amplifiers, and output devices driven by the error amplifiers, the error amplifiers having an input-referred offset voltage. The method includes (a) applying a calibration voltage to an input of the error amplifiers, (b) calibrating a quiescent current of the output devices by changing the calibration voltage so that the calibrated quiescent current has a predetermined current value, the calibration voltage corresponding to the calibrated quiescent current being set as a correction voltage, and (c) operating the amplifier with the correction voltage applied to the input of the error amplifiers. The circuit includes a correction voltage generator supplying a correction voltage to the error amplifier input, a quiescent current detector detecting the quiescent current, and a calibration circuit adjusting the correction voltage so that the quiescent current is calibrated to a predetermined current value.

Abstract: A variable-gain amplifier circuit includes an input port, an output port, and first and second amplifiers coupled therebetween. The first amplifier includes a first amplifier path having a first amplification factor, effective when the input signal has a voltage level in a first range, and a second amplifier path having a second amplification factor greater than the first amplification factor, effective when the input signal has a voltage level in a second range including voltages of a first polarity greater than that in the first range. The second amplifier includes a third amplifier path having the first amplification factor, effective when the input signal has a voltage level in a third range, and a fourth amplifier path having the second amplification factor, effective when the input signal has a voltage level in a fourth range including voltages of a second polarity greater than that in the third range.

Abstract: A circuit for detecting the mirror signal from the output signal of an RF (radio frequency) in an optical disk drive, includes a first peak hold circuit for holding the peak value of the output signal of the RF amplifier to provide a first peak value, a first bottom hold circuit for holding the bottom value of the output signal of the RF amplifier to provide a first bottom value, a differential amplifier for amplifying the difference between the first and second peak values, a second peak hold circuit for holding the peak value of the output signal of the differential amplifier to provide a second peak value, a second bottom hold circuit for holding the bottom value of the output signal of the differential amplifier to provide a second bottom value, a centered value extractor for processing the second peak and bottom values to extract the centered value of the output signal of the RF amplifier, a comparator for comparing the centered value with the output signal of the differential amplifier to generate the m

Abstract: An apparatus and method for adaptively generating a tracking error signal according to a phase error generated due to a nonuniform depth of pits formed in an optical disk.

Abstract: A balance gain tuning apparatus including a first amplifying part amplifying one of signals output from a optical pickup to a fixed gain; a second amplifying part amplifying another signal of the signals output from the optical pickup to a tunable gain; a subtracting part producing a difference of an output of the first amplifying part and that of the second amplifying part; and a servo control part tuning the gain of the second amplifying part in response to an output of the subtracting part.

Abstract: An error compensation circuit for compensating for a frequency error and a boost error of an IC chip having a filter and a boost circuit. The error compensation circuit includes a frequency compensation circuit, a boost compensation circuit, and a switch being switchable in response to a mode control signal. The frequency compensation circuit includes a first level detector to detect a level of a signal output from the filter; a first level comparator to compare an output level of the first level detector with a reference signal level; a first integrator to integrate an output of the first level comparator to generate a frequency error signal; and a first data converter and storage to convert the stored digital data into an analog frequency compensation signal in the normal signal processing mode, and provide the frequency compensation signal to the filter.

Abstract: A read channel circuit of an optical disk reproducing apparatus is adapted to provide stability in servo control and reduce power consumption by revising the offset component of the circuit components after application of reference signals and then the offset component caused by pit depth resulting from signals read out in reproducing a data from an optical disk. The read channel circuit includes: a data converting section for amplifying signals input via different channels and converting them to digital data. A data reproducing section is provided for summing and waveform-equalizing the digital signals, detecting the phase difference between the waveform-equalized signals and reference sampling points, and generating a sampling clock frequency which is provided to the data converting section for compensating for the phase difference.

Abstract: A high speed optical disc reproducing device includes: a gain amplifier for amplifying data picked-up from an optical disc, with a specific amplification gain and a frequency and boost control unit for outputting a frequency and boost gain control signal under the control of a main control unit in accordance with the kind of pick-up and disc used in the reproducing device. The device also includes a boost filter, which serves the functions of boosting high frequency parts of the output signal of the gain amplifier according to the frequency and boost gain control signal, and a uniform group-delaying section which group-delays all of the frequency areas of the output signal. The device minimizes the signal distortion, caused by the difference in the pick-up and disc characteristics of a high speed optical disc reproducing device.

Abstract: A data slicer which effectively compensates for wobble and asymmetrical phenomena due to optical and electrical characteristics of a disk. The data slicer includes a comparator for outputting a pulse signal by comparing an RF signal detected by an pickup device with a slice reference value, a low pass filter for low-pass-filtering the pulse signal output from the comparator, a first differential amplifier for detecting the difference between the output of the low pass filter and a predetermined reference value (Vref), and providing the detected difference as the slice reference value of the comparator, a peak detector for detecting a peak value of the RF signal, a bottom detector for detecting a bottom value of the RF signal, and an average value detection portion for detecting an average value of the peak value detected by the peak detector and the bottom value detected by the bottom detector, and adding the detected value to the slice reference value of the comparator.

Abstract: An apparatus for stabilizing cut-off frequency using a transconductance, especially used in a high-frequency filter circuit, capable of maintaining constant frequency characteristics regardless of noise in association with a clock frequency, changes in the temperature, changes in the power supply voltage and errors in fabrication, when a filter circuit is installed in an IC (Integrated Circuit). The apparatus includes a filtering unit for passing only signals having a frequency band predetermined in the IC; a transconductance setting unit, installed out of the IC, for controlling a transconductance of the filtering unit; and a controlling unit for controlling a transconductance of the transconductance setting unit.

Abstract: A preamplifier for an optical disc system. The preamplifier is based on an automatic gain control (AGC) system for obtaining a constant response and a stable output signal for input signals of a certain amplitude. The preamplifier includes a radio frequency amplifier for amplifying an output signal from the pick-up unit, an AGC unit for amplifying an output signal from the radio frequency amplifier to a desired level, an AGC detector unit coupled at its input terminal to an output terminal of the AGC unit and at its output terminal to an input terminal of the AGC unit. The AGC detector unit serves to rectify an output signal from the AGC unit, compare the rectified signal with a reference signal having a predetermined level, and send the resultant signal obtained by the comparison to the AGC unit. A mode selecting unit is coupled to the AGC detector unit and adapted to select one of several modes of operation, respectively corresponding to different equalization characteristics.

Abstract: A circuit for detecting an NTSC signal or a PAL signal in a laser disk player system. In the laser disk player system, the circuit includes an FM video signal processing part for shaping a waveform of the FM video signal picked-up from the optical pick-up part and for outputting the waveform shaped signal; a BPF (Band Pass Filter) and integrator for filtering and integrating the FM video signal shaped in the waveform from the FM video signal processing part, and for outputting an integral value in the form of an electrical signal; and a comparator for comparing the integral value outputted from the BPF and integrator with a determined reference voltage, and for outputting an NTSC or PAL detecting signal. Thereby, the NTSC or PAL signal can be detected quickly.