Patents by Inventor Chun-Tai Wu

Chun-Tai Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240162833
    Abstract: A power supply unit supplies power to a load, and the power supply unit includes a power factor corrector, a DC conversion module, and an isolated conversion module. The power factor corrector is plugged into a first main circuit board and converts an AC power into a DC power. The DC conversion module is plugged into the first main circuit board and converts the DC power into a main power. The isolated conversion module includes a bus capacitor, the bus capacitor is coupled to the DC conversion module through a first power copper bar, and coupled to the power factor corrector through a second power copper bar. The first power copper bar and the second power copper bar are arranged on a side opposite to the first main circuit board, and are arranged in parallel with the first main circuit board.
    Type: Application
    Filed: November 13, 2023
    Publication date: May 16, 2024
    Inventors: Yi-Sheng CHANG, Cheng-Chan HSU, Chia-Wei CHU, Chun-Yu YANG, Deng-Cyun HUANG, Yi-Hsun CHIU, Chien-An LAI, Yu-Tai WANG, Chi-Shou HO, Zhi-Yuan WU, Ko-Wen LU
  • Publication number: 20240107608
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. In certain configurations, the UE enters a first radio resource control (RRC) connection with a first base station of a first network. The UE receives, from the first base station, an indication that enables the UE to send a first request for deactivating or releasing resources used for communications with the first base station. In response to a determination to enter a second RRC connection with a second base station of a second network, the UE sends, to the first base station, the first request for deactivating or releasing the resources. The UE enters the second RRC connection with the second base station while maintaining the first RRC connection with the first base station.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 28, 2024
    Inventors: Chun-Fan Tsai, Kun-Lin Wu, Mu-Tai Lin
  • Patent number: 11443726
    Abstract: A sound isolation window includes a frame and a plurality of sound blocking bars. The frame has an upper frame portion and a lower frame portion. The frame further has a first sidewall and a second sidewall connected to the upper and lower frame portion. The upper frame portion, the lower frame portion, the first sidewall and the second sidewall form a first opening and an opposite second opening. Each sound blocking bar includes a plane perpendicular to the upper frame portion and the lower frame. The sound blocking bars are arranged along the first direction from the first opening to the second opening and spaced apart from each other. Projections along the first direction of the sound blocking bars over the first opening cover the first opening. The width of each sound blocking bar is less than one-half of the width of the first opening.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: September 13, 2022
    Assignees: Inventec (Pudong) Technology Corporation, INVENTEC CORPORATION
    Inventors: Chun-Tai Wu, Yi-Chen Wang
  • Publication number: 20210151024
    Abstract: A sound isolation window includes a frame and a plurality of sound blocking bars. The frame has an upper frame portion and a lower frame portion. The frame further has a first sidewall and a second sidewall connected to the upper and lower frame portion. The upper frame portion, the lower frame portion, the first sidewall and the second sidewall form a first opening and an opposite second opening. Each sound blocking bar includes a plane perpendicular to the upper frame portion and the lower frame. The sound blocking bars are arranged along the first direction from the first opening to the second opening and spaced apart from each other. Projections along the first direction of the sound blocking bars over the first opening cover the first opening. The width of each sound blocking bar is less than one-half of the width of the first opening.
    Type: Application
    Filed: December 12, 2019
    Publication date: May 20, 2021
    Inventors: Chun-Tai WU, Yi-Chen WANG
  • Patent number: 7989884
    Abstract: A semiconductor structure includes a starting semiconductor substrate having a recessed portion. A semiconductor material is formed in the recessed portion, and has a higher resistivity than the starting semiconductor substrate. A body region extends in the semiconductor material, and has a conductivity type opposite that of the semiconductor material. Source regions extend in the body region, and have a conductivity type opposite that of the body region. A gate electrode extends adjacent to but is insulated from the body region. A first interconnect layer extends over and is in contact with a non-recessed portion of the starting semiconductor substrate. The first interconnect layer and the non-recessed portion provide a top-side electrical contact to portions of the starting semiconductor substrate underlying the semiconductor material.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: August 2, 2011
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Chun-Tai Wu, Ihsiu Ho
  • Publication number: 20090194812
    Abstract: A semiconductor structure includes a starting semiconductor substrate having a recessed portion. A semiconductor material is formed in the recessed portion and has a higher resistivity than the starting semiconductor substrate. A body region extends in the semiconductor material, and has a conductivity type opposite that of the semiconductor material. Source regions extend in the body region, and have a conductivity type opposite that of the body region. A gate electrode extends adjacent to but is insulated from the body region. A first interconnect layer extends over and is in contact with a non-recessed portion of the starting semiconductor substrate. The first interconnect layer and the non-recessed portion provide a top-side electrical contact to portions of the starting semiconductor substrate underlying the semiconductor material.
    Type: Application
    Filed: January 26, 2009
    Publication date: August 6, 2009
    Inventors: Chun-Tai Wu, Ihsiu Ho
  • Patent number: 7482645
    Abstract: A method for forming a semiconductor structure includes the following steps. A starting semiconductor substrate having a top-side surface and a back-side surface is provided. A recess is formed in the starting semiconductor substrate through the top-side of the starting semiconductor substrate. A semiconductor material is formed in the recess. A vertically conducting device is formed in and over the semiconductor material, where the starting semiconductor substrate serves as a terminal of the vertically conducting device. A non-recessed portion of the starting semiconductor substrate allows a top-side contact to be made to portions of the starting semiconductor substrate extending beneath the semiconductor material.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: January 27, 2009
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Chun-Tai Wu, Ihsiu Ho
  • Publication number: 20080242029
    Abstract: A method for forming a semiconductor structure includes the following steps. A starting semiconductor substrate having a top-side surface and a back-side surface is provided. A recess is formed in the starting semiconductor substrate through the top-side of the starting semiconductor substrate. A semiconductor material is formed in the recess. A vertically conducting device is formed in and over the semiconductor material, where the starting semiconductor substrate serves as a terminal of the vertically conducting device. A non-recessed portion of the starting semiconductor substrate allows a top-side contact to be made to portions of the starting semiconductor substrate extending beneath the semiconductor material.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Chun-Tai Wu, Ihsiu Ho