Abstract: An anode material for a secondary battery is provided. The anode material for the secondary battery includes a metal oxide containing four or more than four elements, or an oxide mixture containing four or more than four elements. The metal oxide includes cobalt-copper-tin oxide, silicon-tin-iron oxide, copper-manganese-silicon oxide, tin-manganese-nickel oxide, manganese-copper-nickel oxide, or nickel-copper-tin oxide. The oxide mixture includes the oxide mixture containing cobalt, copper and tin, the oxide mixture containing silicon, tin and iron, the oxide mixture containing copper, manganese and silicon, the oxide mixture containing tin, manganese and nickel, the oxide mixture containing manganese, copper and nickel, or the oxide mixture containing nickel, copper and tin.

Abstract: An anode material for a secondary battery is provided. The anode material for the secondary battery includes a metal oxide containing four or more than four elements, or an oxide mixture containing four or more than four elements. The metal oxide includes cobalt-copper-tin oxide, silicon-tin-iron oxide, copper-manganese-silicon oxide, tin-manganese-nickel oxide, manganese-copper-nickel oxide, or nickel-copper-tin oxide. The oxide mixture includes the oxide mixture containing cobalt, copper and tin, the oxide mixture containing silicon, tin and iron, the oxide mixture containing copper, manganese and silicon, the oxide mixture containing tin, manganese and nickel, the oxide mixture containing manganese, copper and nickel, or the oxide mixture containing nickel, copper and tin.

Abstract: An anode material for a secondary battery is provided. The anode material for the secondary battery includes a metal oxide containing four or more than four elements, or an oxide mixture containing four or more than four elements. The metal oxide includes cobalt-copper-tin oxide, silicon-tin-iron oxide, copper-manganese-silicon oxide, tin-manganese-nickel oxide, manganese-copper-nickel oxide, or nickel-copper-tin oxide. The oxide mixture includes the oxide mixture containing cobalt, copper and tin, the oxide mixture containing silicon, tin and iron, the oxide mixture containing copper, manganese and silicon, the oxide mixture containing tin, manganese and nickel, the oxide mixture containing manganese, copper and nickel, or the oxide mixture containing nickel, copper and tin.

Abstract: An embodiment includes a method. The method includes: forming a first conductive line over a substrate; depositing a first dielectric layer over the first conductive line; depositing a second dielectric layer over the first dielectric layer, the second dielectric layer including a different dielectric material than the first dielectric layer; patterning a via opening in the first dielectric layer and the second dielectric layer, where the first dielectric layer is patterned using first etching process parameters, and the second dielectric layer is patterned using the first etching process parameters; patterning a trench opening in the second dielectric layer; depositing a diffusion barrier layer over a bottom and along sidewalls of the via opening, and over a bottom and along sidewalls of the trench opening; and filling the via opening and the trench opening with a conductive material.

Abstract: An embodiment includes a method. The method includes: forming a first conductive line over a substrate; depositing a first dielectric layer over the first conductive line; depositing a second dielectric layer over the first dielectric layer, the second dielectric layer including a different dielectric material than the first dielectric layer; patterning a via opening in the first dielectric layer and the second dielectric layer, where the first dielectric layer is patterned using first etching process parameters, and the second dielectric layer is patterned using the first etching process parameters; patterning a trench opening in the second dielectric layer; depositing a diffusion barrier layer over a bottom and along sidewalls of the via opening, and over a bottom and along sidewalls of the trench opening; and filling the via opening and the trench opening with a conductive material.

Abstract: An anode material for a secondary battery is provided. The anode material for the secondary battery includes a metal oxide containing four or more than four elements, or an oxide mixture containing four or more than four elements. The metal oxide includes cobalt-copper-tin oxide, silicon-tin-iron oxide, copper-manganese-silicon oxide, tin-manganese-nickel oxide, manganese-copper-nickel oxide, or nickel-copper-tin oxide. The oxide mixture includes the oxide mixture containing cobalt, copper and tin, the oxide mixture containing silicon, tin and iron, the oxide mixture containing copper, manganese and silicon, the oxide mixture containing tin, manganese and nickel, the oxide mixture containing manganese, copper and nickel, or the oxide mixture containing nickel, copper and tin.

Abstract: An embodiment includes a method. The method includes: forming a first conductive line over a substrate; depositing a first dielectric layer over the first conductive line; depositing a second dielectric layer over the first dielectric layer, the second dielectric layer including a different dielectric material than the first dielectric layer; patterning a via opening in the first dielectric layer and the second dielectric layer, where the first dielectric layer is patterned using first etching process parameters, and the second dielectric layer is patterned using the first etching process parameters; patterning a trench opening in the second dielectric layer; depositing a diffusion barrier layer over a bottom and along sidewalls of the via opening, and over a bottom and along sidewalls of the trench opening; and filling the via opening and the trench opening with a conductive material.

Abstract: An embodiment includes a method. The method includes: forming a first conductive line over a substrate; depositing a first dielectric layer over the first conductive line; depositing a second dielectric layer over the first dielectric layer, the second dielectric layer including a different dielectric material than the first dielectric layer; patterning a via opening in the first dielectric layer and the second dielectric layer, where the first dielectric layer is patterned using first etching process parameters, and the second dielectric layer is patterned using the first etching process parameters; patterning a trench opening in the second dielectric layer; depositing a diffusion barrier layer over a bottom and along sidewalls of the via opening, and over a bottom and along sidewalls of the trench opening; and filling the via opening and the trench opening with a conductive material.

Abstract: Examples of fabricating an integrated circuit device are disclosed herein. In an embodiment, an integrated circuit workpiece is received that includes a conductive interconnect feature. A first Inter-Level Dielectric (ILD) layer is formed on the conductive interconnect feature, and a second ILD layer is formed on the first ILD layer. A hard mask is formed on the second ILD layer. A via recess is etched extending through the first ILD layer, the second ILD layer and the hard mask to expose the conductive interconnect feature. The etching includes providing a passivation agent that reacts with a material of the hard mask to reduce etchant sensitivity.

Abstract: An embodiment includes a method. The method includes: forming a first conductive line over a substrate; depositing a first dielectric layer over the first conductive line; depositing a second dielectric layer over the first dielectric layer, the second dielectric layer including a different dielectric material than the first dielectric layer; patterning a via opening in the first dielectric layer and the second dielectric layer, where the first dielectric layer is patterned using first etching process parameters, and the second dielectric layer is patterned using the first etching process parameters; patterning a trench opening in the second dielectric layer; depositing a diffusion barrier layer over a bottom and along sidewalls of the via opening, and over a bottom and along sidewalls of the trench opening; and filling the via opening and the trench opening with a conductive material.

Abstract: A method of forming an interconnect structure is provided. The method includes forming a first dielectric layer, and forming an opening in the first dielectric layer. The method also includes applying a gas to the first dielectric layer adjacent to the opening, where after applying the gas to the first dielectric layer adjacent to the opening, a bottom surface of the opening has been planarized. The method also includes etching the first dielectric layer through the opening to expose a first contact underlying the first dielectric layer, and forming a conductive line in the opening.

Abstract: A method of forming an interconnect structure is provided. The method includes forming a first dielectric layer, and forming an opening in the first dielectric layer. The method also includes applying a gas to the first dielectric layer adjacent to the opening, where after applying the gas to the first dielectric layer adjacent to the opening, a bottom surface of the opening has been planarized. The method also includes etching the first dielectric layer through the opening to expose a first contact underlying the first dielectric layer, and forming a conductive line in the opening.

Abstract: A panel control apparatus and an operating method thereof are provided, and which includes a scalar and a timing controller. The scalar transmits a present display data for composing a display frame, and determines whether to generate a refresh request signal according to a state of the display frame. The timing controller includes a memory, an over driving unit and a panel self refresh unit. When the refresh request signal is not generated, the over driving unit converts the present display data into an over driving display data according to a previous compression data from the memory. When the refresh request signal is generated, the panel self refresh unit compresses the present display data into a refresh display data, and stores the refresh display data into the memory.

Abstract: A self-assembly nano-composite solar cell comprises a substrate, a first electrode layer, a composite absorption layer and a second electrode layer. The first electrode layer is formed on the substrate. The composite absorption layer is formed over the first electrode layer and includes a plurality of vertical nano-pillars, a plurality of gaps each formed between any two adjacent nano-pillars, and a plurality of bismuth sulfide nano-particles filled into the gaps and attached to the nano-pillars. The second electrode layer is formed over the composite absorption layer. Through etching and soaking in solutions, the composite absorption layer with nano-pillars and bismuth sulfide nano-particles is fabricated to form a self-assembly nano-composite solar cell having high power conversion efficiency.

Abstract: A panel control apparatus and an operating method thereof are provided, and which includes a scalar and a timing controller. The scalar transmits a present display data for composing a display frame, and determines whether to generate a refresh request signal according to a state of the display frame. The timing controller includes a memory, an over driving unit and a panel self refresh unit. When the refresh request signal is not generated, the over driving unit converts the present display data into an over driving display data according to a previous compression data from the memory. When the refresh request signal is generated, the panel self refresh unit compresses the present display data into a refresh display data, and stores the refresh display data into the memory.

Abstract: A self-assembly nano-composite solar cell comprises a substrate, a first electrode layer, a composite absorption layer and a second electrode layer. The first electrode layer is formed on the substrate. The composite absorption layer is formed over the first electrode layer and includes a plurality of vertical nano-pillars, a plurality of gaps each formed between any two adjacent nano-pillars, and a plurality of bismuth sulfide nano-particles filled into the gaps and attached to the nano-pillars. The second electrode layer is formed over the composite absorption layer. Through etching and soaking in solutions, the composite absorption layer with nano-pillars and bismuth sulfide nano-particles is fabricated to form a self-assembly nano-composite solar cell having high power conversion efficiency.