Abstract: A control method of display device including obtaining an image displayed by a display device by a computing controller; dividing the image into a plurality of sub-regions by the computing controller; computing a color weight data of each of the plurality of sub-regions by the computing controller; generating a color data for at least one of the plurality of light-emitting components corresponding to each of the plurality of sub-regions based on the color weight data of each of the plurality of sub-regions by the computing controller; transferring the color data for each of the plurality of light-emitting components to the light controller by the computing controller; and controlling each of the plurality of light-emitting components to emit corresponding color of light based on the color data by the light controller.

Abstract: A display device and control method thereof. The display device includes a housing, a display assembly, and a plurality of light-emitting components. The housing has a front surface, an outer peripheral surface and a mounting opening. The outer peripheral surface is connected to the front surface. The mounting opening is located on the front surface and surrounded by the outer peripheral surface. The display assembly is disposed in the mounting opening and exposed to outside. The plurality of light-emitting components are fixed to the housing. A light emitted from the plurality of light-emitting components is partially emitted along a normal direction of the outer peripheral surface, and is partially emitted along a normal direction of the front surface.

Abstract: A display device electrically connectable to an external operation device and a host is provided. The display device includes an imaging unit, a display controller, an image receiving port, a command output port and at least one computing device. The image receiving port obtains image data from the host and transmit to the display controller. The display controller controls the imaging unit to display the image data. The at least one computing device has a host operation mode and a display operation mode. The computing device receives a control command from the external operation device, sends the control command to the host through the command output port in the host operation mode, and sends the control command to the display controller to adjust the display setting in the display operation mode.

Abstract: An alarm system is applied for a computer to warn an owner of an electronic device via a terminal when the electronic device is detached from the computer. The alarm system includes a memory unit and a main controller connected the memory unit. The main unit controller includes a recording unit, a determining unit, and an information obtaining transmitting unit. The recording unit is used to log the electronic device detachably connected to the computer. The determining unit is used to determine whether the electronic device detachably connected to the computer is detached from the computer. The information obtaining transmitting unit is used to read the alarm information from the memory unit when the electronic device is detached from the computer, and transmit the alarm information to the owner' terminal.

Abstract: The present invention is an electronic device having a first device and a second device for reducing power consumption of a computer motherboard. When the computer motherboard is at an S4 or S5 state of an ACPI, the electronic device makes the computer motherboard enter like G3 mechanical off state of the ACPI. The second device determines that when the S4 or S5 state happens makes the first device to cut off a portion of electric components, for example the SIO chip and Southbridge chip, consuming stand-by power, and only supply the stand-by power to the electronic device itself. After the user pressed the power button, the second device will control the first device to connect the stand-by power to the computer motherboard.

Abstract: A computer motherboard has a newly added DS3W mode, which is capable of reducing power consumption of the computer motherboard in Suspend. With a power-saving control device and a power switch device that are newly added to the computer motherboard, power supply to a main memory, the power-saving control device, and the power switch device is maintained continuously, while all the other elements of the computer motherboard may be powered off, but the computer motherboard still has the capability of waking up and resuming from a conventional sleep S3 state, so as to save more power. When a user presses a power button, the power-saving control device and the power switch device resume power supply to the elements that are previously powered off.

Abstract: A computer system includes a north bridge chipset, a south bridge chipset, a memory, and a rapid startup apparatus. The rapid startup apparatus includes a DRAM module to install application programs or operation system programs, a battery, a control chip to control data reading and writing for the DRAM module, a PCI-E interface, and a switch circuit. The application programs or the operation system programs are loaded into the memory via the PCI-E interface, the south bridge chipset, and the north bridge chipset in series. The switch circuit processes voltage of the battery or the PCI-E interface and supply power to the DRAM module.

Abstract: An electronic device for reducing power consumption of a computer motherboard is disclosed. The electronic device enables the computer motherboard to compel interruption of power supply to a south bridge chip and a super input output (SIO) chip of the computer motherboard so as to save power while the computer motherboard is waiting for receipt of a Wake-on-LAN packet. A network chip of the computer motherboard sends a signal to the power-saving electronic device as soon as a Wake-on-LAN event occurs, such that a standby power is electrically connected to the south bridge chip and the SIO chip by the electronic device. The computer motherboard equipped with the electronic device is capable of executing Wake-on-LAN function while compelling interruption of power supply to the south bridge chip and the SIO chip in a power-saving state.

Abstract: An alarm system is applied for a computer to warn an owner of an electronic device via a terminal when the electronic device is detached from the computer. The alarm system includes a memory unit and a main controller connected the memory unit. The main unit controller includes a recording unit, a determining unit, and an information obtaining transmitting unit. The recording unit is used to log the electronic device detachably connected to the computer. The determining unit is used to determine whether the electronic device detachably connected to the computer is detached from the computer. The information obtaining transmitting unit is used to read the alarm information from the memory unit when the electronic device is detached from the computer, and transmit the alarm information to the owner’ terminal.

Abstract: The present invention discloses an electronic device for reducing power consumption during power off of computer motherboard. When the computer motherboard is at S5 soft off state of ACPI, it will make the computer motherboard enter like G3 mechanical off state of ACPI. The electronic device will cut off a portion of electric components consuming stand-by power on the computer motherboard, and only supply the stand-by power to the electronic device itself. Only after the user pressed the power button, the electronic device will connect the stand-by power to the computer motherboard.

Abstract: A method for testing an accuracy of a real time clock is provided. The method includes: applying parameters that comprise a predetermined repetition count on testing the RTC, a predetermined time period, and an acceptable error margin of the RTC; communicating with a local network time protocol (NTP) server for acquiring a system time of the local NTP server; applying a current time of the RTC according to the system time at the beginning of testing the accuracy of the RTC; acquiring the current system time of the local NTP server when the predetermined time period lapse; computing a time difference between the system time of the local NTP server and the current time of the RTC; and determining if the RTC is accurate or not by comparing the time difference and the acceptable error margin, and generating a testing result according to the determination.

Abstract: A PCI Express interface card includes at least two different sized PCI Express connecting interfaces (40), at least two PCI Express buses (50) corresponding to the at least two PCI Express connecting interfaces, a controlling module (10), a switching module (20), and an indicating module (30). The at least two PCI Express connecting interfaces are used to connect with at least two corresponding PCI Express slots on a motherboard (60) to be tested. The controlling module is connected to the at least two PCI Express connecting interfaces via the at least two corresponding PCI Express buses, and communicates with the at least two PCI Express connecting interfaces. The switching module switches the controlling module to corresponding modes according to which of the PCI Express slots is connected with a corresponding PCI Express connecting interface. The indicating module is electrically connected with the controlling module, and indicates whether a test is passed.

Abstract: A system for testing a NAS includes: a data storage device (3) connected with a NAS (6) for storing function test program and test data; a host computer (1) connected with the NAS being used to issue commands for the NAS to self-test itself via the function test program and test data; and at least one USB flash memory (4) connected with the NAS for testing the PCI ports of the NAS. A method for testing a NAS is also disclosed.

Abstract: An electrical cable includes a first layer, a second layer, and a tie layer, disposed between the first layer and the second layer, for bonding the first layer to the second layer. A method of making an electrical cable includes applying a tie layer to an inner layer, the tie layer being miscible with the inner layer, and bonding an outer layer to the tie layer via one of a chemical reaction therebetween and a physical bond therebetween. An electrical cable includes a first layer, a second layer immiscible with the first layer, and a tie layer disposed between the first layer and the second layer, wherein the tie layer is miscible with the first layer and is capable of bonding with the second layer.

Abstract: An electrical cable includes a first layer, a second layer, and a tie layer, disposed between the first layer and the second layer, for bonding the first layer to the second layer. A method of making an electrical cable includes applying a tie layer to an inner layer, the tie layer being miscible with the inner layer, and bonding an outer layer to the tie layer via one of a chemical reaction therebetween and a physical bond therebetween. An electrical cable includes a first layer, a second layer immiscible with the first layer, and a tie layer disposed between the first layer and the second layer, wherein the tie layer is miscible with the first layer and is capable of bonding with the second layer.