Patents by Inventor Chun-Ting Huang
Chun-Ting Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240195082Abstract: An antenna structure includes a ground element, a feeding radiation element, a first radiation element, a second radiation element, a shorting radiation element, a third radiation element, and a fourth radiation element. The feeding radiation element has a feeding point. The first radiation element is coupled to the feeding radiation element. The second radiation element is coupled to the feeding radiation element. The second radiation element and the first radiation element substantially extend in opposite directions. The feeding radiation element is further coupled through the shorting radiation element to the ground element. The third radiation element is coupled to the ground element. The third radiation element is adjacent to the first radiation element. The fourth radiation element is coupled to the ground element. The fourth radiation element is adjacent to the second radiation element.Type: ApplicationFiled: January 12, 2023Publication date: June 13, 2024Inventors: Yi-Chih LO, Chung-Ting HUNG, Chun-Yuan WANG, Chun-I CHEN, Jing-Yao XU, Yan-Cheng HUANG, Chu-Yu TANG
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Publication number: 20240184033Abstract: A light source module includes a light source and a light guide plate. The light guide plate has a light entrance surface, a light exit surface, and a bottom surface. The light entrance surface faces the light source and is located between the light exit surface and the bottom surface. The bottom surface is opposite to the light exit surface and has a plurality of microstructures. The microstructures are a plurality of ridge-shaped microstructures formed in the light guide plate. Each of the microstructures includes a light-facing surface, and a first included angle between the light-facing surface and the bottom surface is 30 degrees to 70 degrees.Type: ApplicationFiled: November 24, 2023Publication date: June 6, 2024Applicant: Industrial Technology Research InstituteInventors: Chun-Ting Lin, Yi-Hsiang Huang, Hung Tsou
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Patent number: 11998613Abstract: The present disclosure provides an immunoconjugate includes an antibody comprising an antigen-binding fragment that specifically binds to an epitope in mesothelin, N-glycan binding domain and an N-glycan; a linker linking to the N-glycan; and a payload A and a payload B conjugated to the linker, respectively; wherein the payload A and the payload B are the same or different. A pharmaceutical composition comprises the immunoconjugate and a method for treating cancer are also provided in the disclosure.Type: GrantFiled: June 4, 2021Date of Patent: June 4, 2024Assignee: DEVELOPMENT CENTER FOR BIOTECHNOLOGYInventors: Shih-Hsien Chuang, Wei-Ting Sun, Ying-Shuan Lailee, Chun-Liang Lai, Wun-Huei Lin, Win-Yin Wei, Shih-Chong Tsai, Cheng-Chou Yu, Chao-Yang Huang
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Patent number: 12001246Abstract: A display control method applicable to an all-in-one (AIO) computer is provided. The AIO computer includes a first monitor and a second monitor. The display control method includes: receiving a control instruction from the first monitor; projecting a display content on the second monitor according to the control instruction; and selectively enabling a touch control function of the second monitor according to the control instruction.Type: GrantFiled: May 2, 2022Date of Patent: June 4, 2024Assignee: ASUSTEK COMPUTER INC.Inventors: Yuni Lai, Jen-Chiu Chiang, Meng-Ru He, Chung-Shang Chi, Jia-Jung Kuo, Hsueh-Chih Tang, Shu-Yun Chen, Chun-Yen Huang, Chi-Rong Hsu, Yi-Ting Chen
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Publication number: 20240178102Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.Type: ApplicationFiled: April 21, 2023Publication date: May 30, 2024Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
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Patent number: 11996630Abstract: An antenna structure includes a ground element, a first radiation element, a second radiation element, a third radiation element, and a nonconductive support element. The first radiation element is coupled to a first grounding point on the ground element. The second radiation element has a feeding point. The second radiation element is adjacent to the first radiation element. The third radiation element is coupled to a second grounding point on the ground element. The third radiation element is adjacent to the second radiation element. The first radiation element, the second radiation element, and the third radiation element are disposed on the nonconductive support element. The second radiation element is at least partially surrounded by the first radiation element. The third radiation element is at least partially surrounded by the second radiation element.Type: GrantFiled: September 2, 2022Date of Patent: May 28, 2024Assignee: QUANTA COMPUTER INC.Inventors: Yu-Chen Zhao, Chung-Ting Hung, Chin-Lung Tsai, Ying-Cong Deng, Kuan-Hsien Lee, Yi-Chih Lo, Kai-Hsiang Chang, Chun-I Cheng, Yan-Cheng Huang
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Patent number: 11982866Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.Type: GrantFiled: December 15, 2022Date of Patent: May 14, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Liang-Ting Ho, Chen-Er Hsu, Yi-Liang Chan, Fu-Lai Tseng, Fu-Yuan Wu, Chen-Chi Kuo, Ying-Jen Wang, Wei-Han Hsia, Yi-Hsin Tseng, Wen-Chang Lin, Chun-Chia Liao, Shou-Jen Liu, Chao-Chun Chang, Yi-Chieh Lin, Shang-Yu Hsu, Yu-Huai Liao, Shih-Wei Hung, Sin-Hong Lin, Kun-Shih Lin, Yu-Cheng Lin, Wen-Yen Huang, Wei-Jhe Shen, Chih-Shiang Wu, Sin-Jhong Song, Che-Hsiang Chiu, Sheng-Chang Lin
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Patent number: 11984669Abstract: Provided is an antenna module including a first planar inverted-F antenna radiator, a first ground plane, a second ground plane, and a conductor. The first planar inverted-F antenna radiator includes a first feeding terminal and a first ground terminal. The first ground terminal is connected to the first ground plane. The second ground plane is located on one side of the first ground plane. A gap exists between the first ground plane and the second ground plane. The conductor is located between the first ground plane and the second ground plane and connects the first ground plane with the second ground plane.Type: GrantFiled: July 11, 2022Date of Patent: May 14, 2024Assignee: PEGATRON CORPORATIONInventors: Chin-Ting Huang, Chun-Kai Wang, Hsi-Kai Hung, Sony Chayadi
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Publication number: 20240154447Abstract: A power system including a first battery pack, a second battery pack, and a power management circuit is disclosed. The first battery pack has a first end and a second end, and has a first battery capacity. The second battery pack has a third end and a fourth end. The third end is coupled to the second end of the first battery pack and provides a low battery voltage. The fourth end is grounded, the second battery pack has a second battery capacity, and the second battery capacity is greater than the first battery capacity. The power management circuit is coupled to the second battery pack to receive the low battery voltage, and provides a component operating voltage to an electronic components based on the low battery voltage.Type: ApplicationFiled: August 29, 2023Publication date: May 9, 2024Applicant: PEGATRON CORPORATIONInventors: Yi-Hsuan Lee, Liang-Cheng Kuo, Chun-Wei Ko, Ya Ju Cheng, Chih Wei Huang, Ywh Woei Yeh, Yu Cheng Lin, Yen Ting Wang
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Publication number: 20240144868Abstract: The present disclosure provides a pixel circuit with pulse width compensation, and the pixel circuit includes a pulse width modulation circuit and a pulse amplitude modulation circuit, and the pulse amplitude modulation circuit is electrically connected to the pulse width modulation circuit. The pulse width modulation circuit includes a P-type pulse width compensation transistor and a first P-type control transistor, and the first P-type control transistor is electrically connected to the P-type pulse width compensation transistor. The pulse amplitude modulation circuit includes a second P-type control transistor, a first capacitor, a P-type driving transistor and a light-emitting element. The second P-type control transistor is electrically connected to the first P-type control transistor. The first capacitor is electrically connected to the second P-type control transistor.Type: ApplicationFiled: December 8, 2022Publication date: May 2, 2024Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
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Patent number: 11973117Abstract: Methods of forming contacts for source/drain regions and a contact plug for a gate stack of a finFET device are disclosed herein. Methods include etching a contact opening through a dielectric layer to expose surfaces of a first source/drain contact and repairing silicon oxide structures along sidewall surfaces of the contact opening and along planar surfaces of the dielectric layer to prevent selective loss defects from occurring during a subsequent selective deposition of conductive fill materials and during subsequent etching of other contact openings. The methods further include performing a selective bottom-up deposition of conductive fill material to form a second source/drain contact. According to some of the methods, once the second source/drain contact has been formed, the contact plug may be formed over the gate stack.Type: GrantFiled: August 3, 2021Date of Patent: April 30, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Hsien Huang, Chang-Ting Chung, Wei-Cheng Lin, Wei-Jung Lin, Chih-Wei Chang
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Publication number: 20240136183Abstract: A photo resist layer is used to protect a dielectric layer and conductive elements embedded in the dielectric layer when patterning an etch stop layer underlying the dielectric layer. The photo resist layer may further be used to etch another dielectric layer underlying the etch stop layer, where etching the next dielectric layer exposes a contact, such as a gate contact. The bottom layer can be used to protect the conductive elements embedded in the dielectric layer from a wet etchant used to etch the etch stop layer.Type: ApplicationFiled: January 2, 2024Publication date: April 25, 2024Inventors: Yu-Shih Wang, Hong-Jie Yang, Chia-Ying Lee, Po-Nan Yeh, U-Ting Chiu, Chun-Neng Lin, Ming-Hsi Yeh, Kuo-Bin Huang
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Publication number: 20240135897Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.Type: ApplicationFiled: December 11, 2022Publication date: April 25, 2024Inventors: De-Fu CHEN, Po Lun CHEN, Chun-Ta CHEN, Ta-Jen HUANG, Po-Tsun LIU, Guang-Ting ZHENG, Ting-Yi YI
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Patent number: 11961489Abstract: The present disclosure provides a scan driving circuit, which includes a pull-up output charging circuit, a pull-down discharge circuit, a pre-charge circuit, an anti-noise start-up circuit and an anti-noise pull-down discharge circuit. The pull-up output charging circuit is electrically connected to an output terminal, and the pull-down discharge circuit is electrically connected to the output terminal. The pre-charge circuit is electrically connected to the pull-up output charging circuit and the pull-down discharge circuit through a driving node. The anti-noise start-up circuit is electrically connected to the pre-charge circuit. The anti-noise pull-down discharge circuit is electrically connected to the anti-noise start-up circuit, and the anti-noise pull-down discharge circuit is electrically connected to the driving node.Type: GrantFiled: December 11, 2022Date of Patent: April 16, 2024Assignees: Interface Technology (ChengDu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution LimitedInventors: De-Fu Chen, Po Lun Chen, Chun-Ta Chen, Ta-Jen Huang, Po-Tsun Liu, Guang-Ting Zheng, Ting-Yi Yi
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Patent number: 11939603Abstract: A modified cutinase is disclosed. The cutinase has the modified amino acid sequence of SEQ ID NO: 2, wherein the modification is a substitution of asparagine at position 181 with alanine, or substitutions of asparagine at position 181 with alanine and phenylalanine at position 235 with leucine. The modified enzyme has improved PET-hydrolytic activity, and thus, the high-activity PET hydrolase is obtained, and the industrial application value of the PET hydrolase is enhanced.Type: GrantFiled: June 21, 2023Date of Patent: March 26, 2024Assignee: HUBEI UNIVERSITYInventors: Chun-Chi Chen, Jian-Wen Huang, Jian Min, Xian Li, Beilei Shi, Panpan Shen, Yu Yang, Yumei Hu, Longhai Dai, Lilan Zhang, Yunyun Yang, Rey-Ting Guo
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Patent number: 11943935Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.Type: GrantFiled: September 26, 2022Date of Patent: March 26, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
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Publication number: 20240096781Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
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Patent number: 11913981Abstract: An electrostatic sensing system configured to sense an electrostatic information of a fluid inside a fluid distribution component and including an electrostatic sensing assembly, a signal amplifier and an analog-to-digital converter. The electrostatic sensing assembly includes a sensing component, and a shield. The sensing component is configured to be disposed at the fluid distribution component. The sensing component is disposed through the fluid distribution component so as to be partially located in the fluid distribution component. The shield surrounds a part of the sensing component that is located in the fluid distribution component. At least part of the shield is located on an upstream side of the sensing component. The signal amplifier is electrically connected to the sensing component. The analog-to-digital converter is electrically connected to the signal amplifier. The shield has an opening spaced apart from the sensing component.Type: GrantFiled: December 21, 2020Date of Patent: February 27, 2024Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Mean-Jue Tung, Ming-Da Yang, Shi-Yuan Tong, Yu-Ting Huang, Chun-Pin Wu
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Publication number: 20230259594Abstract: Disclosed are systems, apparatuses, processes, and computer-readable media to implement a heterogenous biometric authentication process in a control system. For example, a method may include detecting the presence of a first person at a first time period and in an area associated with a function controlled by a control system. The method may include transmitting an authentication request to a first device detected by the control system, and receiving an authentication response from the first device. The authentication response includes information related to a biometric authentication performed at the first device. The method may further include authenticating the first person in the control system based on the information related to the biometric authentication. The method may then perform the function based on the authentication.Type: ApplicationFiled: February 11, 2022Publication date: August 17, 2023Inventors: Dashan GAO, Lei WANG, Ning BI, Mithun Kumar RANGANATH, Chun-Ting HUANG, Scott RUSNAK, David NEAL
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Publication number: 20230206698Abstract: Methods, systems, and apparatuses are provided to automatically determine whether an image is spoofed. For example, a computing device may obtain an image, and may execute a trained convolutional neural network to ingest elements of the image. Further, and based on the ingested elements of the image, the executed trained convolutional neural network generates an output map that includes a plurality of intensity values. In some examples, the trained convolutional neural network includes a plurality of down sampling layers, a plurality of up sampling layers, and a plurality of joint spatial and channel attention layers. Further, the computing device may determine whether the image is spoofed based on the plurality of intensity values. The computing device may also generate output data based on the determination of whether the image is spoofed, and may store the output data within a data repository.Type: ApplicationFiled: December 23, 2021Publication date: June 29, 2023Inventors: Chun-Ting HUANG, Lei Wang, Ning Bi