Patents by Inventor Chun-Ting Lu
Chun-Ting Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240096781Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.Type: ApplicationFiled: March 20, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chun-Ti Lu, Hao-Yi Tsai, Chia-Hung Liu, Yu-Hsiang Hu, Hsiu-Jen Lin, Tzuan-Horng Liu, Chih-Hao Chang, Bo-Jiun Lin, Shih-Wei Chen, Hung-Chun Cho, Pei-Rong Ni, Hsin-Wei Huang, Zheng-Gang Tsai, Tai-You Liu, Po-Chang Shih, Yu-Ting Huang
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Publication number: 20240085634Abstract: An optical fiber transmission device includes a substrate, a photonic integrated circuit, and an optical fiber assembly. The photonic integrated circuit is disposed on an area of the substrate. The substrate has a protruding structure at an interface with an edge of the photonic integrated circuit. The optical fiber assembly includes an optical fiber and a ferrule that sleeves the optical fiber. The protruding structure of the substrate is configured to abut against the ferrule to limit the position of the optical fiber assembly in a vertical direction of the substrate, such that the protruding structure is a stopper for the optical fiber assembly in the vertical direction.Type: ApplicationFiled: September 14, 2023Publication date: March 14, 2024Applicant: AuthenX Inc.Inventors: Chun-Chiang YEN, Po-Kuan SHEN, Sheng-Fu LIN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
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Publication number: 20240089000Abstract: An optical fiber network device includes a fiber and a photonic integrated circuit. Fiber receives a first optical signal and transmits a second optical signal. A first wavelength of first optical signal is different from a second wavelength of second optical signal. Photonic integrated circuit includes a laser chip, a photodetector, a wavelength division multiplexing coupler, a first optical modulation element and a second optical modulation element. Laser chip is disposed on photonic integrated circuit, and is configured to generate first optical signal. Photodetector detects second optical signal. Wavelength division multiplexing coupler is configured to couple first optical signal to fiber, and receives second optical signal. First optical modulation element is coupled to wavelength division multiplexing coupler and laser chip, and is configured to modulate first optical signal.Type: ApplicationFiled: September 14, 2023Publication date: March 14, 2024Applicant: AuthenX Inc.Inventors: Sheng-Fu LIN, Po-Kuan SHEN, Chun-Chiang YEN, Yi-Ting LU, Jun-Rong CHEN, Jenq-Yang CHANG, Mao-Jen WU
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Publication number: 20230386764Abstract: A multiple function button for an information handling system includes an outer shell and an inner button. The outer shell includes multiple channels having first, second, third and fourth channels. The inner button is inserted within the outer shell. The inner button includes a tab and a contact component. The tab moves within the multiple channels. When the tab is within the first channel, the inner button is in a first position and contact component is positioned over a first contact of the information handling system. When the tab is within the third channel, the inner button is in a second position and the contact component is positioned over a second contact of the information handling system.Type: ApplicationFiled: May 26, 2022Publication date: November 30, 2023Inventors: Jer-Yo Lee, Chun-Ting Lu, Cheng-Hsiang Chuang
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Publication number: 20230386765Abstract: A multiple function button for an information handling system includes an outer button and an inner button. The outer button includes a first contact component positioned over a first contact of the information handling system. The first contact is associated with a first operation within the information handling system. The inner button is inserted within the outer button and includes a second contact component. The second contact component is positioned over a second contact of the information handling system, which in turn is associated with a second operation within the information handling system.Type: ApplicationFiled: May 26, 2022Publication date: November 30, 2023Inventors: Jer-Yo Lee, Chun-Ting Lu, Cheng-Hsiang Chuang
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Publication number: 20200001739Abstract: A method of information provision is implemented by an electric carrier system which includes an electric carrier device storing a carrier identifier and carrier information, a power supply device providing electrical energy to the electric carrier device, and storing reference carrier identifiers and battery information, and an electronic device communicable with the electric carrier device and a server. The method includes: by the electric carrier device when in communication with the electric device, transmitting to the electronic device, integrated information including the carrier and battery information; and by the electronic device which is in communication with the server, transmitting the integrated information to the server.Type: ApplicationFiled: April 24, 2019Publication date: January 2, 2020Inventors: Chun-Ting LU, Chia-Cheng TU, Te-Chuan LIU, Jen-Chiun LIN, Yuh-Rey CHEN, Po-Yu CHUANG
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Patent number: 9570381Abstract: Described herein are semiconductor packages having an insulating layer and the manufacturing methods thereof, wherein semiconductor packages include a die pad; a plurality of leads surrounding the die pad, wherein each of the leads comprises an inner lead portion and an outer lead portion, and wherein at least one lead further comprises a trace portion; a chip disposed on the die pad and electrically connected to the leads; a molding compound encapsulating the chip, the inner lead portions and the trace portion, where the outer lead portions and a first surface of the trace portion are exposed from the molding compound; and an insulating layer covering the first surface of the trace portion.Type: GrantFiled: April 2, 2015Date of Patent: February 14, 2017Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Chun-Ting Lu, Chun-Hung Lin, Yi-Ting Chen
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Publication number: 20160293531Abstract: Described herein are semiconductor packages having an insulating layer and the manufacturing methods thereof, wherein semiconductor packages include a die pad; a plurality of leads surrounding the die pad, wherein each of the leads comprises an inner lead portion and an outer lead portion, and wherein at least one lead further comprises a trace portion; a chip disposed on the die pad and electrically connected to the leads; a molding compound encapsulating the chip, the inner lead portions and the trace portion, where the outer lead portions and a first surface of the trace portion are exposed from the molding compound; and an insulating layer covering the first surface of the trace portion.Type: ApplicationFiled: April 2, 2015Publication date: October 6, 2016Inventors: Chun-Ting LU, Chun-Hung LIN, Yi-Ting CHEN
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Publication number: 20080308258Abstract: A micro-channel heat sink comprises an upper cover layer and a cooling layer. The cooling layer comprises at least one inlet fluid tank, a plurality of micro-channels, and at least one outlet fluid tank. The inlet fluid tank can store and deliver the working fluids, and the outlet fluid tank collects the heated working fluid flowing through the plurality of micro-channels. The plurality of micro-channels are disposed between the inlet fluid tank and the outlet fluid tank, wherein the cross sectional area of each of the micro-channels increases along the direction towards the outlet fluid tank.Type: ApplicationFiled: May 16, 2008Publication date: December 18, 2008Applicant: NATIONAL TSING HUA UNIVERSITYInventors: CHIN PAN, PO CHANG LI, CHUN TING LU, KUN CHENG LIN
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Patent number: 6812681Abstract: A digital dynamic trace adjustment pulse width modulate controller uses a core processing unit to receive a phase signal and outputs a pulse width modulate signal. It is observed that when the output voltage is rising or dropping then changing the pulse width modulate signal of the output end, the duty rate of the phase signal will be maintained at fifty percent degree.Type: GrantFiled: April 16, 2003Date of Patent: November 2, 2004Assignee: Silicom Technology Co., Ltd.Inventors: Chin-Tsai Hong, Chung-Fu Chou, Chun-Ting Lu, Thou-Vun Pang
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Publication number: 20040207376Abstract: A digital dynamic trace adjustment pulse width modulate controller uses a core processing unit to receive a phase signal and outputs a pulse width modulate signal. It is observed that when the output voltage is rising or dropping then changing the pulse width modulate signal of the output end, the duty rate of the phase signal will be maintained at fifty percent degree.Type: ApplicationFiled: April 16, 2003Publication date: October 21, 2004Inventors: Chin-Tsai Hong, Chung-Fu Chou, Chun-Ting Lu, Thou-Vun Pang
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Publication number: 20040196670Abstract: This invention relates to a digital time mirrored pulse width modulate controller. The controller is electrically connected to a converter unit in which it comprises at least one comparator unit. The comparator unit outputs/inputs a voltage (Vo) and a preset voltage (Vset), and outputs a phase signal having low-level and high-level standards and a core digital processing unit, wherein the core digital processing unit outputs a pulse width modulate signal, through the units mentioned above. The characteristics of the invention can be summed up as follows: the elapsed time of the phase signal in high-level and in low-level is equal, and the root mean square of the output voltage in converter unit is equal to the preset voltage (Vset).Type: ApplicationFiled: April 3, 2003Publication date: October 7, 2004Inventors: Chin-Tsai Hong, Chung-Fu Chou, Chun-Ting Lu, Thou-Vun Pang