Abstract: A semiconductor structure includes a substrate, a through via penetrating the substrate, a trench capacitor, a first redistribution layer (RDL), a second RDL, and a contact feature. The trench capacitor extends from a back surface toward a front surface of the substrate, wherein the trench capacitor is separated from an active area at the front surface of the substrate. The first RDL is disposed over the front surface and electrically connecting to the through via, wherein the active area is disposed between the trench capacitor and the first RDL. The second RDL is disposed over the back surface and electrically connecting to the through via and the trench capacitor. The contact feature is disposed over the first RDL and electrically connecting to the trench capacitor through the first RDL, the through via and the second RDL. A method of manufacturing the semiconductor structure is also provided.

Abstract: The invention provides a drainage network monitoring system. The system comprises a sensing module for detecting one or more conditions at a location in the drainage network; a processing module for processing data received from the sensing module; a wireless communications module for communicating the processed data substantially in real-time to one or more wireless devices including a wireless notification device configured to issue notification information to users, wherein the wireless communications module utilizes a narrow bandwidth, low power wireless communications protocol to communicate processed data to the wireless notification device, and wherein the sensing module has a standalone power supply.

Abstract: A semiconductor device including: a first formation site and a second formation site for forming a first conductive bump and a second conductive bump; when a first environmental density corresponding to the first formation site is greater than a second environmental density corresponding to the second formation site, a cross sectional area of the second formation site is greater than a cross sectional area of the first formation site; wherein the first environmental density is determined by a number of formation sites around the first formation site in a predetermined range and the second environmental density is determined by a number of formation sites around the second formation site in the predetermined range; wherein a first area having the first environmental density forms an ellipse layout while a second area having the second environmental density forms a strip layout surrounding the ellipse layout.

Abstract: A semiconductor device includes a substrate having a bonding area and a pad area, a first inter-metal dielectric (IMD) layer on the substrate, a metal interconnection in the first IMD layer, a first pad on the bonding area and connected to the metal interconnection, and a second pad on the pad area and connected to the metal interconnection. Preferably, the first pad includes a first portion connecting the metal interconnection and a second portion on the first portion, and the second pad includes a third portion connecting the metal interconnection and a fourth portion on the third portion, in which top surfaces of the second portion and the fourth portion are coplanar.

Abstract: An interconnect structure including a contact via in an interlayer dielectric, a first conductive feature in a first dielectric layer, the first dielectric layer over the interlayer dielectric, a first liner in the first dielectric layer, the first liner comprising a first part in contact with a sidewall surface of the first conductive feature, and a second part in contact with a bottom surface of the first conductive feature. The interconnect structure includes a first cap layer in contact with a top surface of the first conductive feature, a second conductive feature in a second dielectric layer, the second dielectric layer over the first dielectric layer, a second liner in the second dielectric layer, wherein the first and second conductive features comprise a first conductive material, and the contact via, first liner, first cap layer, and second liner comprise a second conductive material chemically different than the first conductive material.

Abstract: A server includes a relay unit adapted to transmit a video data related to a livestream from a terminal of a livestreamer of the livestream to a terminal of a viewer, a determination unit adapted to determine whether the livestream has been terminated for an unexpected reason, a maintaining unit adapted to maintain a state of the livestream when it is determined that the livestream has been terminated, and a resume unit adapted to resume the livestream with the maintained state when the resume unit receives an instruction to resume the livestream from the terminal of the livestreamer within a predetermined period after it is determined that the livestream has been terminated.

Abstract: A semiconductor structure includes a plurality of dies over a redistribution layer (RDL). A first die comprises: a first substrate; a first (RDL), disposed over a front surface of the first substrate; and a first back-side through via (BSTV), extending from a back surface of the first substrate toward the front surface of the first substrate. A second die, adjacent to the first die and separated from the first die by a molding material, comprises: a second substrate; a second RDL, disposed over a front surface of the second substrate; and a second BSTV, extending from a back surface of the second substrate toward the front surface of the second substrate. The RDL continuously covers the back surfaces of the first and second substrates, and electrically connects the first RDL to the second RDL via the first and second BSTVs. A method of manufacturing the semiconductor structure is also provided.

Abstract: A method for performing camera modality adaptation in a simultaneous localization and mapping (SLAM) device is provided. The SLAM device includes a camera sensor and a SLAM processor. The method includes acquiring data from the SLAM device, and determining, based on the acquired data, an operational condition of the SLAM device. The method also includes deciding, based on the determined operational condition, a camera modality for the SLAM device. The method further includes controlling, based on the decided camera modality, a camera modality of an image sequence inputted into the SLAM processor.

Abstract: A duty cycle control circuit generates a duty cycle control signal for controlling the duty cycle of a DC-DC buck conversion signal. The duty cycle control circuit includes: a dual ramp generator for generating a first ramp signal and a second ramp signal having the same frequency and different phases; a first comparator for comparing the first ramp signal with a feedback signal to generate a first control signal; a second comparator for comparing the second ramp signal with the feedback signal to generate a second control signal; and a logical circuit for performing a first predetermined logical operation according to the first control signal and a first conduction-control signal to generate a first part of the duty cycle control signal, and performing a second predetermined logical operation according to the second control signal and a second conduction-control signal to generate a second part of the duty cycle control signal.

Abstract: A wireless communication method employed by an access point (AP) includes: negotiating with another AP for setting up a coordinated service period (SP), and sending a first announcement frame inside a first basic service set (BSS) to inform that the coordinated SP has been created. The step of negotiating with the another AP for setting up the coordinated SP includes: receiving a request frame from the another AP, wherein the request frame includes a plurality of SP parameters; and sending a response frame to the another AP. The AP belongs to the first BSS, and the another AP belongs to a second BSS different from the first BSS.

Abstract: Provided are a semiconductor device and a method of forming the same. The semiconductor device includes a substrate, a plurality of semiconductor structures, a source/drain (S/D) region, and a gate stack. The substrate includes an active region extending along a first direction. The semiconductor structures are stacked on the active region. The S/D region abuts the plurality of semiconductor structures. The gate stack wraps the semiconductor structures and extends along a second direction different from the first direction. A bottommost semiconductor structure of the semiconductor structures has a width in the second direction greater than a width of a topmost semiconductor structure of the semiconductor structures in the second direction.

Abstract: An example non-transitory machine-readable storage medium comprising instructions executable by a processing resource of a computing device to cause the computing device to: receive a video feed of a participant in a video conference; identify the participants within the video feed; determine a probability that a characteristic is being experienced by the participant; determine a relevancy score of the participant based on the probability that the characteristic is being experienced by the participant; and display the participant relative to other participants in the video conference based on the relevancy score.

Abstract: Disclosed are a method for managing data and a storage device thereof. The storage device includes at least one memory including a plurality of planes, each plane includes a plurality of blocks, and peer blocks in different planes are belonged to operate in a multi-plane mode. The plurality of blocks are detected to find a unavailable block. Then, available blocks corresponding to the unavailable block in planes other than the plane where the unavailable block is located are marked as backup blocks that do not operate in the multi-plane mode. A first block with effective data is selected from the plurality of blocks operating in the multi-plane mode. Data of the first block is moved to a backup block in the same plane.

Abstract: In some embodiments, the present disclosure relates to a semiconductor structure. The semiconductor structure includes a stacked semiconductor substrate having a semiconductor material disposed over a base semiconductor substrate. The base semiconductor substrate has a first coefficient of thermal expansion and the semiconductor material has a second coefficient of thermal expansion that is different than the first coefficient of thermal expansion. The stacked semiconductor substrate includes one or more sidewalls defining a crack stop ring trench that continuously extends in a closed path between a central region of the stacked semiconductor substrate and a peripheral region of the stacked semiconductor substrate surrounding the central region. The peripheral region of the stacked semiconductor substrate includes a plurality of cracks and the central region is substantially devoid of cracks.

Abstract: A ring for clasping a cylindrical object includes a first element, a second element and a switch mechanism. The second element is circumferentially butted with the first element, and one end of the first element is adjacent to one end of the second element. The end of the second element has a protrusion protruding outwardly. The switch mechanism includes an abutting member adjacent to the end of the first element and configured to be rotated to abut against or move away from the protrusion of the end of the second element. When the abutting member is rotated and abuts against the protrusion of the end of the second element, the second element is fixed; when the abutting member is rotated and moves away from the protrusion of the end of the second element, the second element is released.

Abstract: A display driver and a charge recycling method are provided. The display driver includes a charging and discharging circuit and a control circuit. A first terminal of the charging and discharging circuit is coupled to at least one of the scan lines, and a second terminal of the charging and discharging circuit is coupled to at least one of the data lines. The control circuit is coupled to a first control terminal and a second control terminal of the charging and discharging circuit. The charging and discharging circuit receives a first current generated by discharging the at least one of the scan lines to charge the capacitor based on a first control signal. The charging and discharging circuit discharges the capacitor to generate a second current for charging the at least one of the data lines based on a second control signal.

Abstract: A hardware accelerator is provided. The hardware accelerator includes a first memory; a source address generation unit coupled to the first memory; a data collection unit coupled to the first memory; a first data queue coupled to the data collection unit; a data dispersion unit coupled to the first data queue; a destination address generation unit coupled to the data dispersion unit; an address queue coupled to the destination address generation unit; a second data queue coupled to the data dispersion unit; and a second memory coupled to the second data queue. The hardware accelerator can perform anyone or any combination of tensor stride, tensor reshape and tensor transpose to achieve tensorflow depth-to-space permutation or tensorflow space-to-depth permutation.

Abstract: Disclosed is a method to fabricate a multifunctional collimator structure In one embodiment, an optical collimator, includes: a dielectric layer; a substrate; and a plurality of via holes, wherein the dielectric layer is formed over the substrate, wherein the plurality of via holes are configured as an array along a lateral direction of a first surface of the dielectric layer, wherein each of the plurality of via holes extends through the dielectric layer and the substrate from the first surface of the dielectric layer to a second surface of the substrate in a vertical direction, wherein the substrate has a bulk impurity doping concentration equal to or greater than 1×1019 per cubic centimeter (cm?3) and a first thickness, and wherein the bulk impurity doping concentration and the first thickness of the substrate are configured so as to allow the optical collimator to filter light in a range of wavelengths.

Abstract: A memory control method, a memory storage device, and a memory control circuit unit are disclosed. The method includes: performing a first write operation based on a first programming mode to sequentially write first data to a plurality of first chip enabled regions via a plurality of channels; after the first write operation is performed, performing a second write operation based on a second programming mode to sequentially write second data to the first chip enabled regions and at least one second chip enabled region via the channels. A total number of the first chip enabled regions is larger than a total number of the second chip enabled region.

Abstract: In some embodiments, an integrated circuit device includes multiple rows of functional cells, with each row having a cell height. At least one of rows of functional cells includes at least one digital low-dropout voltage regulator (DLVR) cell with the cell height for the row. The DLVR cell includes: an input terminal, an output terminal, a voltage supply terminal, a reference voltage terminal, and one or more pairs of transistors. Each pair of transistors are arranged in cascode configuration connected between the voltage supply terminal and output terminal. The gate of one of the transistors the cascode configuration is connected to the input terminal, and the gate of the other transistor in the cascode configuration is connected to the reference voltage terminal. The four terminals each comprises a metal track in the bottom metal layer and disposed within the cell height.