Abstract: An electronic device is provided which may include a tray, an exterior cover, and/or a first hooking structure. The tray may be inserted or drawn to or from an inside via an opening of a housing of the electronic device, and may include a space for receiving a card. The exterior cover may be movably coupled to the tray. The first hooking structure may be disposed inside the electronic device, and may maintain a closed state of the exterior cover, and may release the closed state of the exterior cover in response to pressing of the exterior cover.

Abstract: An inverting apparatus and an AC power system are provided. The inverting apparatus includes an inverting circuit, a detection circuit, and a control circuit. The inverting circuit receives a DC input voltage and converts the DC input voltage into an AC output voltage. The detection circuit samples the AC output voltage and compares the sampled AC output voltage respectively with a first reference voltage and a second reference voltage so as to generate a first indication signal and a second indication signal. The control circuit controls the operation of the inverting circuit. The control circuit determines whether the amplitude of the AC output voltage is located within an operating voltage range during each driving cycles according to the first and the second indication signals, and decides whether to enable an overvoltage protection or an undervoltage protection to control the power conversion of the inverting circuit according to the determination results.

Abstract: An inverting apparatus and a photovoltaic power system using the same are provided. The inverting apparatus includes an inverting circuit, a control circuit, and a voltage regulator-based ground detection circuit. The control circuit controls the power conversion of the inverting circuit. The voltage regulator-based ground detection circuit samples an input voltage of the DC input power, and performs voltage regulation and voltage division on the input voltage to generate a ground indication voltage. The electric potential of the output terminal of the voltage regulator is built based on a photovoltaic ground terminal of a photovoltaic module. The ground indication voltage is the voltage difference between an output terminal of the voltage regulator and a device ground terminal of the inverting apparatus. The control circuit determines whether a ground fault occurs to the photovoltaic module and enables a ground protection mechanism to control the inverting circuit when the ground fault occurs.

Abstract: A transmitting device includes a transmitting chain, a configurable power amplifier device and an impedance tuning circuit. The transmitting chain is arranged to generate a radio frequency signal. The configurable power amplifier device is arranged to support at least a first power amplifier configuration and a second power amplifier configuration, wherein the configurable power amplifier device employs the first power amplifier configuration to receive and amplify the radio frequency signal when the transmitting device is operated in a first operation mode, and employs the second power amplifier configuration to receive and amplify the radio frequency signal when the transmitting device is operated in a second operation mode. The impedance tuning circuit is arranged to adjust an output impedance of the configurable power amplifier device employing the second power amplifier configuration when the transmitting device is operated in the second operation mode.

Abstract: An immersion lithography apparatus includes a lens system, an immersion hood, a wafer stage, an inspection system and a cleaning fluid supplier. The lens system is configured to project a pattern onto a wafer. The immersion hood is configured to confine an immersion fluid between the lens system and the wafer, and includes a peripheral hole configured to suck up the immersion fluid. The wafer stage is configured to position the wafer under the lens system. The inspection system is configured to detect whether there is contamination in the peripheral hole. The cleaning fluid supplier is coupled to the inspection system and configured to supply a cleaning fluid through the peripheral hole to remove the contamination, in which the inspection system and the cleaning fluid supplier are coupled to the wafer stage.

Abstract: The disclosed invention provides an efficient method for beam training to enable spatial multiplexing MIMO operation and spatial combining in a wireless network. The invention discloses a simple and efficient beam-training algorithm and protocol for MIMO operation that operates in high SNR condition for reliable MIMO operation. In one novel aspect, the best MIMO beam combinations are determined after TX sector sweeping and RX sector sweeping. In addition, the selection criteria includes not only signal quality, but also considers mutual interference and leakage among multiple MIMO spatial streams to improve overall MIMO performance.

Abstract: The present invention relates to novel organic compounds comprising at least two different selections selected from the group consisting of N-phenyl carbazole, dibenzofuran, dibenzothiophene, triphenylene, aza-(N-phenyl carbazole), aza-dibenzofuran, aza-dibenzothiophene, and aza-triphenylene. The compounds are useful for organic light-emitting diodes. The compounds are also useful for charge-transport and charge-blocking layers, and as hosts in the light-emissive layer for organic light emitting devices (OLEDs).

Abstract: a DC-DC converter, including a conversion unit configured to convert a battery voltage input to an input terminal of the DC-DC converter into a first voltage, and to output the first voltage to an output terminal of the DC-DC converter, a feedback voltage generation unit configured to generate a feedback voltage by dividing the first voltage, an error amplifier (AMP) configured to supply, to a pulse width modulation (PWM) control circuit, an error signal indicating a voltage difference between the feedback voltage and a reference voltage, the PWM control circuit being configured to control the conversion unit, corresponding to the error signal, thereby changing the first voltage, and a reference voltage supply unit configured to supply the reference voltage to the error AMP, and to change the reference voltage.

Abstract: A method and terminal for use in a communication system are discussed. The terminal can transmit a random access preamble via a physical random access channel (PRACH) to a network. The terminal may monitor a random access response after transmitting the random access preamble during a specific time window. Furthermore, if no random access response containing a random access preamble identifier corresponding to the transmitted random access preamble is received within the specific time window and a specific random access response contains a backoff indicator subheader is received, a preamble transmission counter is incremented by 1. A subsequent random access preamble transmission is delayed by a backoff time selected using a backoff indicator in the backoff indicator subheader, if the random access preamble was selected by a medium access control (MAC) layer.

Abstract: A shallow trench isolation (STI) structure is formed on a substrate. Part of the STI structure is removed to form a first fin structure and a second fin structure extending above a support structure on the substrate. A first part of the STI structure is located between the first fin structure and the second fin structure and has a first top surface higher than an interface between the first fin structure and the support structure. A second part of the STI structure is located adjacent to the first fin structure and has a second top surface lower than the interface between the first fin structure and the support structure. An etching process is performed to remove part of the first fin structure and the second fin structure. Part of the support structure adjacent to the second part of the STI structure is removed during the etching process.

Abstract: An inverting apparatus and a control method thereof are provided. The inverting apparatus includes an inverting circuit, a capacitor, and a control circuit. The inverting circuit receives a DC input power and is configured to convert the DC input power into an AC output power, wherein an AC output current of the AC output power is preset to a preset output current. The capacitor is connected to an output terminal of the inverting circuit. The control circuit is coupled to the inverting circuit and is configured to control a power conversion of the inverting circuit, wherein the control circuit superimposes a preset capacitor compensation current of which the phase leads to the preset output current on the preset output current, so as to control the inverting circuit to adjust the AC output current and provide the adjusted AC output current to a power grid.

Abstract: A method includes forming a dummy gate stack over a semiconductor substrate, removing the dummy gate stack to form a recess, and implanting a portion of the semiconductor substrate through the recess. During the implantation, an amorphous region is formed from the portion of the semiconductor substrate. The method further includes forming a strained capping layer, wherein the strained capping layer extends into the recess. An annealing is performed on the amorphous region to re-crystallize the amorphous region. The strained capping layer is then removed.

Abstract: This invention relates to an optical anisotropic film wherein liquid crystals of a liquid crystal layer can be more effectively aligned using a photo-alignment layer, and superior stability of liquid crystal alignment and high interaction between the liquid crystal layer and the photo-alignment layer can be exhibited, and to an optical device including the optical anisotropic film. The optical anisotropic film includes a substrate having P (polarity) of 0.01 to 0.35 as defined by a predetermined equation; a photo-alignment layer formed on the substrate and including a photo-alignment polymer in which at least a portion of a photo-reactive group is optically aligned, with P (polarity) of 0.02 to 0.28; and a liquid crystal layer formed on the photo-alignment layer.

Abstract: A device for preparing an elongated implanted medical apparatus, such as a cardiac lead, for extraction from the body of a patient. The device includes a first handle and a second handle. At least the first handle has a surface for receiving the implanted apparatus therealong. A wire member having a first end and a second end is positioned to span a distance between the surface of the first handle, and the second handle. The wire member first end is removably engaged with the first handle, and the wire member second end is removably engaged with the second handle. The wire member is sized and arranged to enable the wire member to be wound around a length of the implanted apparatus to facilitate extraction of the apparatus with a lead extraction device.

Abstract: An inverter apparatus is provided. The inverter apparatus includes a direct current to direct current (DC/DC) converter, a direct current to alternating current (DC/AC) converter and a control circuit. The DC/DC converter is arranged for converting an input power to a DC power according to a control signal. The DC/AC converter is coupled to the DC/DC converter, and is arranged for receiving the DC power, and generating an AC power according to the DC power. The control circuit is coupled to the DC/DC converter, and is arranged for generating the control signal according to a reference power and the input power so as to control an operation of the DC/DC converter, detecting the control signal to generate a detection result, and controlling the reference power according to the detection result so as to adjust a duty cycle of the control signal.

Abstract: A method for semiconductor fabrication includes providing mask layers on opposite sides of a substrate, the substrate having one or more mandrels. Dummy spacers are formed along a periphery of the mask layers. A dummy gate structure is formed between the dummy spacers. The dummy spacers are removed to provide a recess. Low-k spacers are formed in the recess.

Abstract: A voltage regulator includes an amplifier, an output stage coupled with the amplifier, at least one back-bias circuit, and an output end coupled with the output stage and with the amplifier. The output stage includes at least one transistor having a bulk and a drain. The at least one back-bias circuit is coupled with the bulk of the at least one transistor. The output end is configured to be coupled with a memory array and with an output end of another voltage regulator. The back-bias circuit is configured to reduce a contention current between the voltage regulator and the other voltage regulator during a standby mode.

Abstract: Methods for protecting data on an integrated circuit including a memory are described. One method includes storing nonvolatile protection codes on the integrated circuit. The nonvolatile protection codes have a first value indicating a protected state or a second value indicating an unprotected state for respective sectors in a plurality of sectors of the memory. The method includes storing volatile protection codes on the integrated circuit. The volatile protection codes have a first value indicating a protected state or a second value indicating an unprotected state for respective sectors in the plurality of sectors. The method includes blocking modification in a particular sector using circuitry on the integrated circuit when the volatile protection code for the particular sector has the first value, else allowing modification in the particular sector, and setting the volatile protection codes to values of the nonvolatile protection codes in an initialization procedure.

Abstract: Methods for forming electrical contacts are provided. First and second FETs are formed over a semiconductor substrate. Openings are etched in a dielectric layer formed over the substrate, where the openings extend to source and drain regions of the FETs. A hard mask is formed over the source and drain regions of FETs. A first portion of the hard mask is removed, where the first portion is formed over the source and drain regions of the first FET. First silicide layers are formed over the source and drain regions of the first FET. A second portion of the hard mask is removed, where the second portion is formed over the source and drain regions of the second FET. Second silicide layers are formed over the source and drain regions of the second FET. A metal layer is deposited within the openings to fill the openings.

Abstract: A semiconductor device includes an active layer, a source electrode, a drain electrode, a gate electrode, an interlayer dielectric, an inter-source layer, an inter-source plug, an inter-drain layer, an inter-drain plug, an inter-gate layer, and an inter-gate plug. The active layer is made of III-V group semiconductors. The source electrode, the drain electrode, and the gate electrode are disposed on the active layer. The gate electrode is disposed between the source electrode and the drain electrode. The interlayer dielectric covers the source electrode, the drain electrode, and the gate electrode. The inter-source layer, the inter-drain layer, and the inter-gate layer are disposed on the interlayer dielectric. The inter-source plug is electrically connected to the source electrode and the inter-source layer. The inter-drain plug is electrically connected to the drain electrode and the inter-drain layer. The inter-gate plug is electrically connected to the gate electrode and the inter-gate layer.