Patents by Inventor Chun To

Chun To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230362836
    Abstract: A method for adjusting a transmitting (TX) power ratio of a radio module includes: mapping a radiofrequency (RF) exposure limit to a TX power limit; interacting with at least one other radio module for adjusting the TX power ratio, to obtain an adjusted TX power ratio; and adjusting the TX power limit according to the adjusted TX power ratio, to generate an adjusted TX power limit of the radio module.
    Type: Application
    Filed: April 7, 2023
    Publication date: November 9, 2023
    Applicant: MEDIATEK INC.
    Inventors: Han-Chun Chang, Yen-Wen Yang, Yi-Hsuan Lin
  • Publication number: 20230361120
    Abstract: A semiconductor device includes first-type-channel field effect transistors (FETs) including a first first-type-channel FET including a first gate structure and a second first-type-channel FET including a second gate structure. The first first-type-channel FET has a smaller threshold voltage than the second first-type-channel FET. The first gate structure includes a first work function adjustment material (WFM) layer and the second gate structure includes a second WFM layer. At least one of thickness and material of the first and second WFM layers is different from each other.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 9, 2023
    Inventors: Shun-Jang LIAO, Chia-Chun LIAO, Shu-Hui WANG, Shih-Hsun CHANG
  • Publication number: 20230361417
    Abstract: A battery pack includes a plurality of battery modules; a vent frame disposed along the edges of the plurality of battery modules; and a housing accommodating the plurality of battery modules and the vent frame, wherein the vent frame includes a pair of vertical beams formed parallel to a first direction and a pair of horizontal beams formed parallel to a second direction intersecting the first direction, the vertical beam and the horizontal beam each having a shape of a tube and including a cover formed on the vertical beam or the horizontal beam in a length direction, and a passage surrounded by the cover for gas to pass through.
    Type: Application
    Filed: March 26, 2021
    Publication date: November 9, 2023
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Yongho CHUN, Donghyun KIM, Byung Do JANG, Hyoungsuk LEE
  • Publication number: 20230362196
    Abstract: The present invention includes the following steps: loading a master policy, a plurality of sub-policies, and environment data; wherein the sub-policies have different inference costs; selecting one of the sub-policies as a selected sub-policy by using the master policy; generating at least one action signal according to the selected sub-policy; applying the at least one action signal to an action executing unit; detecting at least one reward signal from a detecting module; training the master policy using at least one real inference cost of the at least one reward signal and an expected inference cost of the selected sub-policy to minimize inference cost; the present invention trains the master policy using Hierarchical Reinforcement Learning with an asymmetrical policy architecture, thus allowing the master policy to reduce inference cost while maintaining satisfying performance for a deep neural network model.
    Type: Application
    Filed: May 4, 2022
    Publication date: November 9, 2023
    Inventor: Chun-Yi LEE
  • Publication number: 20230357730
    Abstract: The invention relates to the use of specific terminal deoxynucleotidyl transferase (TdT) enzymes or the homologous amino acid sequence of PoIµ, PoI?, PoI?, and PoI? of any species or the homologous amino acid sequence of X family polymerases of any species in a method of nucleic acid synthesis, to methods of synthesizing nucleic acids, and to the use of kits comprising said enzymes in a method of nucleic acid synthesis. The invention also relates to the use of terminal deoxynucleotidyl transferases or homologous enzymes and 3?-blocked nucleoside triphosphates in a method of template independent nucleic acid synthesis.
    Type: Application
    Filed: August 4, 2021
    Publication date: November 9, 2023
    Inventors: Gordon Ross McInroy, Ian Haston Cook, Michael Chun Hao Chen, Sihong Chen
  • Publication number: 20230361042
    Abstract: Partial barrier-free vias and methods for forming such are disclosed herein. An exemplary interconnect structure of a multilayer interconnect feature includes a dielectric layer. A cobalt-comprising interconnect feature and a partial barrier-free via are disposed in the dielectric layer. The partial barrier-free via includes a first via plug portion disposed on and physically contacting the cobalt-comprising interconnect feature and the dielectric layer, a second via plug portion disposed over the first via plug portion, and a via barrier layer disposed between the second via plug portion and the first via plug portion. The via barrier layer is further disposed between the second via plug portion and the dielectric layer. The cobalt-comprising interconnect feature can be a device-level contact or a conductive line of the multilayer interconnect feature. The first via plug portion and the second via plug portion can include tungsten, cobalt, and/or ruthenium.
    Type: Application
    Filed: July 24, 2023
    Publication date: November 9, 2023
    Inventors: Tsung-Ling Tsai, Shen-Nan Lee, Mrunal A. Khaderbad, Chung-Wei Hsu, Chen-Hao Wu, Teng-Chun Tsai
  • Publication number: 20230361050
    Abstract: A package structure includes a mounting pad having a mounting surface; a semiconductor chip having a magnetic device, a first magnetic field shielding, and a molding. The semiconductor chip comprises a first surface perpendicular to a thickness direction of the semiconductor chip, a second surface opposite to the first surface, wherein the second surface is attached to the mounting surface of the mounting pad, and a third surface connecting the first surface and the second surface. The first magnetic field shielding including a plurality of segments laterally at least partially surrounding the semiconductor chip, wherein a bottom surface of the first magnetic field shielding is attached to the mounting surface of the mounting pad, wherein the mounting surface comprises first portion free from overlapping with the first magnetic field shielding from a top view perspective. The molding surrounding the mounting pad and in direct contact with the mounting surface.
    Type: Application
    Filed: July 18, 2023
    Publication date: November 9, 2023
    Inventors: HARRY-HAK-LAY CHUANG, CHIA-HSIANG CHEN, MENG-CHUN SHIH, CHING-HUANG WANG, TIEN-WEI CHIANG
  • Publication number: 20230362391
    Abstract: A video decoder may be configured to determine a motion vector and a motion vector precision for a current block; identify a current block template within the current picture; search within a search area for a final reference block template that corresponds to the current block template, wherein to search within the search area, the one or more processors are further configured to: identify an initial reference block template based on the motion vector, search other reference block templates around the initial reference block template using a step size that is set to an initial step size, and iteratively reduce the step size from the initial step size until the step size is set to a final step size that equals the motion vector precision; determine a prediction block for the current block based on the final reference block template.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 9, 2023
    Inventors: Chun-Chi Chen, Han Huang, Zhi Zhang, Vadim Seregin, Marta Karczewicz
  • Publication number: 20230360993
    Abstract: A die stacking structure, a semiconductor package and a method for manufacturing the die stacking structure are provided. The die stacking structure includes a first device die; second device dies, bonded onto the first device die, and arranged side-by-side; a gap profile modifier, laterally enclosing bottommost portions of the second device dies, wherein a thickness of the gap profile modifier gradually decreases away from sidewalls of the second device dies; and a dielectric material, covering the gap profile modifier and laterally surrounding the second device dies.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Su-Chun Yang, Jih-Churng Twu, Jiung Wu, Chih-Hang Tung, Chen-Hua Yu
  • Publication number: 20230360926
    Abstract: A method for processing an integrated circuit includes forming a plurality of transistors. The method utilizes a reversed tone patterning process to selectively drive dipoles into the gate dielectric layers of some of the transistors while preventing dipoles from entering the gate dielectric layers of other transistors. This process can be repeated to produce a plurality of transistors each having different threshold voltages.
    Type: Application
    Filed: August 18, 2022
    Publication date: November 9, 2023
    Inventors: Lung-Kun CHU, Jia-Ni YU, Chun-Fu LU, Kuo-Cheng CHIANG, Chih-Hao WANG
  • Publication number: 20230357118
    Abstract: The invention relates to processes for preparing carbaprostacyclin analogues and intermediates prepared from the processes. The invention also relates to cyclopentenone intermediates in racemic or optically active form.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Applicant: CHIROGATE INTERNATIONAL INC.
    Inventors: CHUN-YU LIN, TZYH-MANN WEI, SHIH-YI WEI
  • Publication number: 20230361124
    Abstract: A semiconductor device includes a first active region and a second active region disposed over a substrate. A first source/drain component is grown on the first active region. A second source/drain component is grown on the second active region. An interlayer dielectric (ILD) is disposed around the first source/drain component and the second source/drain component. An isolation structure extends vertically through the ILD. The isolation structure separates the first source/drain component from the second source/drain component.
    Type: Application
    Filed: July 19, 2023
    Publication date: November 9, 2023
    Inventors: Ta-Chun Lin, Kuan-Lin Yeh, Chun-Jun Lin, Kuo-Hua Pan, Mu-Chi Chiang
  • Publication number: 20230357238
    Abstract: The present invention is generally directed to inhibitors of BCL-2 proteins useful in the treatment of diseases and disorders modulated by said enzyme and having the Formula (A):
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Applicant: Eil Therapeutics, Inc.
    Inventors: Volodymyr KYSIL, Vladislav Zenonovich PARCHINSKY, Alexei PUSHECHNIKOV, Alexandre Vasilievich IVACHTCHENKO, Ruben ABAGYAN, Andrew ORRY, Polo Chun-Hung LAM, Nikolay SAVCHUK
  • Publication number: 20230361208
    Abstract: In some embodiments, the present disclosure relates to a method of forming a high electron mobility transistor (HEMT) device. The method includes forming a passivation layer over a substrate. A source contact and a drain contact are formed within the passivation layer. A part of the passivation layer is removed to form a cavity. The cavity has a lower portion formed by a first sidewall and a second sidewall of the passivation layer and an upper portion formed by the first sidewall of the passivation layer and a sidewall of the source contact. A gate structure is formed within the passivation layer between the drain contact and the cavity. A cap structure is formed within the cavity.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 9, 2023
    Inventors: Ming-Cheng Lin, Chen-Bau Wu, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang
  • Publication number: 20230359522
    Abstract: The present disclosure provides a method for controlling a data storage device. The method includes: storing a first data in a first area of a memory of the data storage device; storing a second data in a second area of the memory, wherein the second data is associated with the first; reading the first data and the second data via a first communication interface; and in response to the read first data and second data, generating a first output signal.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Inventor: CHUN-LU LEE
  • Patent number: 11806168
    Abstract: A physiological detection system including a light source module, a photo sensor and a processor is provided. The light source module is configured to provide light to illuminate a skin region. The photo sensor is configured to detect emergent light passing the skin region with at least one signal source parameter and output an image signal. The processor is configured to calculate a confident level according to the image signal to accordingly adjust the at least one signal source parameter.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: November 7, 2023
    Assignee: PIXART IMAGING INC.
    Inventors: Sheau-Foong Chong, Chun-Wei Chen
  • Patent number: 11806909
    Abstract: A biaxially oriented polyester film having the following physical property is provided: when cooled from the molten state at a cooling rate of 20° C./min, an observed recrystallization temperature is 175° C.-200° C. The biaxially oriented polyester film is formed by a thick sheet before bidirectional stretching that is melted and extruded by an extruder and then cooled and formed on a casting roll. The thick sheet before stretching having the following physical property as analyzed by differential scanning calorimetry: a crystallization rate is less than 10%.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: November 7, 2023
    Assignee: NAN YA PLASTICS CORPORATION
    Inventors: Wen-Cheng Yang, Chen An Wu, Chun-Cheng Yang, Chia-Yen Hsiao
  • Patent number: 11810943
    Abstract: A light-emitting device, includes a substrate, including an upper surface; a first light emitting unit and a second light emitting unit, formed on the upper surface, wherein each of the first light emitting unit and the second light emitting unit includes a lower semiconductor portion and an upper semiconductor portion; and a conductive structure electrically connecting the first light emitting unit and the second light emitting unit; wherein the lower semiconductor portion of the first light emitting unit includes a first sidewall and a first upper surface; and wherein the first side wall includes a first sub-side wall and a second sub-side wall, an obtuse angle is formed between the first sub-side wall and the first upper surface and another obtuse angle is formed between the second sub-side wall and the upper surface.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: November 7, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Po-Shun Chiu, Tsung-Hsun Chiang, Liang-Sheng Chi, Jing Jiang, Jie Chen, Tzung-Shiun Yeh, Hsin-Ying Wang, Hui-Chun Yeh, Chien-Fu Shen
  • Patent number: 11806715
    Abstract: A method for moving an aqueous droplet comprising providing an electrokinetic device including a first substrate having a matrix of electrodes, wherein each of the matrix electrodes is coupled to a thin film transistor, and wherein the matrix electrodes are overcoated with a functional coating comprising: a dielectric layer in contact with the matrix electrodes, a conformal layer in contact with the dielectric layer, and a hydrophobic layer in contact with the confornial layer; a second substrate comprising a top electrode; a spacer disposed between the first substrate and the second substrate and defining an electrokinetic workspace; and a voltage source operatively coupled to the niatrix electrodes. The method further comprises disposing an aqueous droplet on a first matrix electrode; and providing a differential electrical potential between the first matrix electrode and a second matrix electrode with the voltage source, thereby moving the aqueous droplet.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: November 7, 2023
    Assignee: Nuclera Ltd
    Inventors: Michael Chun Hao Chen, Sumit Kalsi, Laurence Livingstone Bell, Gordon Ross McInroy, David Zhitomirsky, Luke M. Slominski, Richard J. Paolini, Jr., Cristina Visani
  • Patent number: D1003681
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: November 7, 2023
    Inventor: Yu-Chun Liu