Patents by Inventor Chun To

Chun To has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11998971
    Abstract: The present disclosure provides a hot-press formed part comprising a plated steel sheet and an aluminum alloy plated layer formed on the plated steel sheet, wherein the aluminum alloy plated layer comprises: an alloying layer (I) formed on the plated steel sheet and containing, by weight %, 5-30% of Al; an alloying layer (II) formed on the alloying layer (I) and containing, by weight %, 30 to 60% of Al; an alloying layer (III) formed on the alloying layer (II) and containing, by weight %, 20-50% of Al and 5-20% of Si; and an alloying layer (IV) formed continuously or discontinuously on at least a part of the surface of the alloying layer (III), and containing 30-60% of Al, wherein the rate of the alloying layer (III) exposed on the outermost surface of the aluminum alloy plated layer is 10% or more.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: June 4, 2024
    Assignee: POSCO CO., LTD
    Inventors: Seong-Woo Kim, Jin-Keun Oh, Sang-Heon Kim, Hyo-Sik Chun
  • Patent number: 12002712
    Abstract: A method includes forming a first metallic feature, forming a dielectric layer over the first metallic feature, etching the dielectric layer to form an opening, with a top surface of the first metallic feature being exposed through the opening, and performing a first treatment on the top surface of the first metallic feature. The first treatment is performed through the opening, and the first treatment is performed using a first process gas. After the first treatment, a second treatment is performed through the opening, and the second treatment is performed using a second process gas different from the first process gas. A second metallic feature is deposited in the opening.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Hsien Huang, I-Li Chen, Pin-Wen Chen, Yuan-Chen Hsu, Wei-Jung Lin, Chih-Wei Chang, Ming-Hsing Tsai
  • Patent number: 12002518
    Abstract: A memory device is provided. The memory device includes: a memory cell array including a plurality of memory cells; a page buffer circuit connected to the memory cell array through a plurality of bit lines and including a page buffer connected to each of the plurality of bit lines, the page buffer including at least one first latch for storing data based on a voltage level of a first sensing node; and a control circuit configured to adjust a level of a voltage signal provided to the page buffer circuit. The page buffer includes a trip control transistor arranged between the at least one first latch and the first sensing node, and wherein the control circuit is further configured to, based on a read operation being performed on the memory cell array, control a trip control voltage to be provided to a gate of the trip control transistor. A level of the trip control voltage varies according to a temperature of the memory device.
    Type: Grant
    Filed: March 31, 2022
    Date of Patent: June 4, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yongsung Cho, Kyoman Kang, Minhwi Kim, Ilhan Park, Jinyoung Chun
  • Patent number: 11998186
    Abstract: Methods and devices for tissue fixation. A cortical button with a rib between two slotted openings. The rib increases the cortical button structural rigidity without increasing palpability. An adjustable loop construct with two discrete locking passages that provides manageable loop reduction and improved tissue coupling. The adjustable loop construct may be coupled to tissue via a passing construct. An assembly with a reduction bar, a button and an adjustable loop construct, the assembly provided assembled in a first configuration that disassembles to guide steps of tissue fixation. The reduction bar may be assembled to the reduction bar for reducing the adjustable loop construct.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: June 4, 2024
    Assignees: Smith & Nephew, Inc., Smith & Nephew Orthopaedics AG, Smith & Nephew Asia Pacific Pte. Limited
    Inventors: Ali Hosseini, Christopher David MacCready, Kendra O'Malley, Geoffrey Ian Karasic, Zenan Qi, Benjamin Michael Hall, Chun Liu, Paul McGovern, Han Teik Yeoh
  • Patent number: 12002774
    Abstract: An integrated circuit (IC) comprising an enhanced passivation scheme for pad openings and trenches is provided. In some embodiments, an interlayer dielectric (ILD) layer covers a substrate and at least partially defines a trench. The trench extends through the ILD layer from a top of the ILD layer to the substrate. A conductive pad overlies the ILD layer. A first passivation layer overlies the ILD layer and the conductive pad, and further defines a pad opening overlying the conductive pad. A second passivation layer overlies the ILD layer, the conductive pad, and the first passivation layer, and further lines sidewalls of the first passivation layer in the pad opening and sidewalls of the ILD layer in the trench. Further, the second passivation layer has a low permeability for moisture or vapor relative to the ILD layer.
    Type: Grant
    Filed: September 8, 2022
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hong Chang, Chun-Yi Yang, Kun-Ming Huang, Po-Tao Chu, Shen-Ping Wang, Chien-Li Kuo
  • Patent number: 12002528
    Abstract: A memory device is provided, including a first bit cell including a first memory cell coupled to a first word line and a second bit cell including a second memory cell coupled to a second word line. The first and second memory cells are coupled to a first control line and further coupled to a first bit line through first and second nodes. The second bit cell further includes a first protection array coupled to the second memory cell at the second node coupled to the first bit line and further coupled to a third word line. When the first and second bit cells operate in different operational types, the first protection array is configured to generate an adjust voltage to the second node according to a voltage level of the third word line while the first bit cell is programmed.
    Type: Grant
    Filed: June 30, 2023
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Gu-Huan Li, Tung-Cheng Chang, Perng-Fei Yuh, Chia-En Huang, Chun-Ying Lee, Yih Wang
  • Patent number: 12002761
    Abstract: A semiconductor device includes a semiconductor substrate, a dielectric structure, an electrical insulating and thermal conductive layer and a circuit layer. The electrical insulating and thermal conductive layer is disposed over the semiconductor substrate. The dielectric structure is disposed over the electrical insulating and thermal conductive layer, wherein a thermal conductivity of the electrical insulating and thermal conductive layer is substantially greater than a thermal conductivity of the dielectric structure. The circuit layer is disposed in the dielectric structure.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hang Tung, Chen-Hua Yu, Tung-Liang Shao, Su-Chun Yang, Wen-Lin Shih
  • Patent number: 12002684
    Abstract: A method for CMP includes following operations. A metal stack is received. The metal layer stack includes at least a first metal layer and a second metal layer, and a top surface of the first metal layer and a top surface of the second metal layer are exposed. A protecting layer is formed over the second metal layer. A portion of the first metal layer is etched. The protecting layer protects the second metal layer during the etching of the portion of the first metal layer. A top surface of the etched first metal layer is lower than a top surface of the protecting layer. The protecting layer is removed from the second metal layer.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ji Cui, Fu-Ming Huang, Ting-Kui Chang, Tang-Kuei Chang, Chun-Chieh Lin, Wei-Wei Liang, Liang-Guang Chen, Kei-Wei Chen, Hung Yen, Ting-Hsun Chang, Chi-Hsiang Shen, Li-Chieh Wu, Chi-Jen Liu
  • Patent number: 12003218
    Abstract: A mixer with a filtering function and a method for linearization of the mixer are provided. The mixer includes at least one amplifier, a transconductance device and a feedback network. The at least one amplifier is configured to output a filtered voltage signal according to an input voltage signal. The transconductance device is coupled to the at least one amplifier, and is configured to generate a filtered current signal according to the filtered voltage signal. The feedback network is coupled between any output terminal among at least one output terminal of the transconductance device and an input terminal of the at least one amplifier. More particularly, the mixer is configured to output a modulated signal according to the filtered current signal.
    Type: Grant
    Filed: September 19, 2022
    Date of Patent: June 4, 2024
    Assignee: MEDIATEK INC.
    Inventors: Tse-Yu Chen, Chun-Wei Lin
  • Patent number: 12003200
    Abstract: The present invention relates to a 4-phase switched reluctance motor which is configured as a 4-phase motor by coaxially arranging two 2-phase motor units, is capable of effectively driving forward and backward by calculating a switching angle at a time point earlier than the starting point of an inductance increasing period in forward and backward rotations, maximizes the initial driving torque, and minimizes vibration noise by not generating the biased force on a shaft.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: June 4, 2024
    Inventor: Young Chun Jeung
  • Patent number: 12002803
    Abstract: The present application discloses a semiconductor device, an electronic system and an electrostatic discharge (ESD) protection method for a semiconductor device thereof. The semiconductor device includes a substrate, an operation solder structure disposed on a first surface of the substrate for receiving an operation signal, a detection solder structure disposed on the first surface of the substrate for receiving a chip connection signal, and a semiconductor chip disposed on a second surface of the substrate. The semiconductor chip includes an operation electrical contact coupled to the operation solder structure, a detection electrical contact coupled to the detection solder structure, an ESD protection unit coupled to the operation electrical contact, and a logic circuit coupled to the detection electrical contact for adjusting capacitance of the ESD protection unit according to the chip connection signal.
    Type: Grant
    Filed: May 11, 2023
    Date of Patent: June 4, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Chun-Lu Lee
  • Patent number: 12004061
    Abstract: A dual-mode Bluetooth terminal configured to receive a first input from a user, send a first BLE pairing advertisement message in response to the first input, where an address type in the first BLE pairing advertisement message is public, an advertisement address in the first BLE pairing advertisement message is a fixed advertisement address, and the first BLE pairing advertisement message carries an identifier used to indicate that the first dual-mode Bluetooth terminal does not support bit rate/enhanced data rate (BR/EDR), receive a second input from the user, enter a conventional Bluetooth discoverable mode in response to the second input, receive a paging message, and send a paging response in response to the paging message, where the paging response carries a media access control (MAC) address of the first dual-mode Bluetooth terminal, and the first input is different from the second input.
    Type: Grant
    Filed: August 1, 2018
    Date of Patent: June 4, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yunsheng Peng, Zhonglin Xia, Chun Liu
  • Patent number: 12002536
    Abstract: A sensing module, a memory device, and a sensing method are provided to perform a read operation so that the un-programmed/programmed state of a memory cell is identified. The sensing module includes a sensing amplifier and a current sink, and both are electrically connected to the memory cell. The sensing amplifier generates a sensing current and identifies the un-programmed/programmed state of the memory cell accordingly. The current sink receives a reference current being equivalent to the summation of the sensing current and a cell current flowing through the memory cell. The reference current is constant, and the sensing current is changed with the cell current. The cell current is generated based on a high read voltage and a low read voltage applied to the memory cell. The sensing current is higher if the memory cell is un-programmed, and the sensing current is lower if the memory cell is programmed.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: June 4, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yun-Chen Chou, Tien-Yen Wang, Chun-Hsiung Hung
  • Patent number: 12002854
    Abstract: A semiconductor device having an improved source/drain region profile and a method for forming the same are disclosed. In an embodiment, a method includes etching one or more semiconductor fins to form one or more recesses; and forming a source/drain region in the one ore more recesses, the forming the source/drain region including epitaxially growing a first semiconductor material in the one or more recesses at a temperature of 600° C. to 800° C., the first semiconductor material including doped silicon germanium; and conformally depositing a second semiconductor material over the first semiconductor material at a temperature of 300° C. to 600° C., the second semiconductor material including doped silicon germanium and having a different composition than the first semiconductor material.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: June 4, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Heng-Wen Ting, Kei-Wei Chen, Chii-Horng Li, Pei-Ren Jeng, Hsueh-Chang Sung, Yen-Ru Lee, Chun-An Lin
  • Patent number: 12003931
    Abstract: An electronic device according to an embodiment of the present invention may include: a housing including a first housing and a second housing; a hinge unit rotatably connected to the first housing and the second housing; a display; a first speaker disposed in the first housing; a second speaker disposed in the second housing; at least one sensor; and a memory. The memory may store instructions which, when executed, cause the processor to: receive an event related to audio data; identify a state of the electronic device on the basis of information obtained through the at least one sensor; determine at least one speaker to output the audio data, among the first speaker and the second speaker, on the basis of the state of the electronic device; and output the audio data through the at least one speaker.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: June 4, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woosung Chun, Dongyup Lee, Hokeun Kwak, Chanyoung Moon, Doosik Park, Mooyoung Kim, Kihuk Lee
  • Patent number: 12001203
    Abstract: A self-propelled device includes a spherical housing and an internal drive system. The self-propelled device can further include an internal structure having a magnet holder that holds a first set of magnets and an external accessory comprising a second set of magnets to magnetically interact, through the spherical housing, with the first set magnets.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: June 4, 2024
    Assignee: Sphero, Inc.
    Inventors: Ian H. Bernstein, Adam Wilson, Chun Kong, Ross MacGregor
  • Patent number: 12003549
    Abstract: A method for processing a security policy of a device may include a step for receiving, from another device, a first message including first information about a security policy of the other device. The first message may include a direct communication request message or a link modification request message. The method may further include the steps of: determining whether to accept or reject the first message on the basis of both the first information about the security policy of the other device and second information about the security policy of the device; and sending a second message on the basis of the determination.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: June 4, 2024
    Assignee: LG Electronics Inc.
    Inventors: Dongjoo Kim, Sungduck Chun
  • Patent number: 11999968
    Abstract: This disclosure provides modified T cells possessing both cell killing function and antigen presenting cell function and method of culturing the same. By administration of the modified T cell, cancer cells in a subject may be effectively inhibited via cell-mediated immunity.
    Type: Grant
    Filed: October 22, 2021
    Date of Patent: June 4, 2024
    Assignee: FullHope Biomedical Co., Ltd
    Inventors: Jan-Mou Lee, Chun-Wei Yu, Chih-Hao Fang, Ya-Fang Cheng, Li-Tzong Chen
  • Patent number: 12003230
    Abstract: Systems and methods are described herein for controlling a switch. In some embodiments, circuitry may detect a voltage across the switch. A current reference signal may be generated based on the voltage across the switch. The switch may be controlled based, at least in part, on the current reference signal.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 4, 2024
    Assignee: MediaTek Inc.
    Inventors: Yun-Yao Hung, Chien-Lung Lee, Shao-Siang Ng, Chun-Yen Tseng
  • Patent number: 12003898
    Abstract: A projector and a projection method are provided. The projector includes a control device, a projection optical engine, a distance sensing device, and an image capturing device. The projection optical engine projects a first projection image to a projection surface according to first image data. The distance sensing device senses multiple distance parameters of a projection area. The image capturing device captures the first projection image to obtain a first captured image. The control device performs a keystone correction operation and a leveling correction operation on the first image data. The projection optical engine projects a second projection image to the projection surface according to the corrected first image data. The control device obtains a second captured image including the second projection image through the image capturing device, and analyzes the second captured image to project current projection image size information in the second projection image.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: June 4, 2024
    Assignee: Coretronic Corporation
    Inventors: Chun-Chieh Wang, Fan-Chieh Chang