Patents by Inventor Chun-Wei Liao

Chun-Wei Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250043054
    Abstract: A method for manufacturing a large-particle-size styrene butadiene latex includes mixing a first styrene-butadiene latex with a polyacrylate agglomerating agent and an inorganic salt solution to allow the first styrene-butadiene latex to undergo an agglomeration process, so as to obtain a second styrene-butadiene latex that has a particle size larger than that of the first styrene-butadiene latex. The polyacrylate agglomerating agent is present in an amount ranging from 0.1 parts by weight to 1 part by weight and an inorganic salt in the inorganic salt solution is present in an amount of 0.25 parts by weight, based on 100 parts by weight of the first styrene-butadiene latex. The first styrene-butadiene latex is stable and not susceptible to emulsion breaking during the agglomeration process.
    Type: Application
    Filed: November 28, 2023
    Publication date: February 6, 2025
    Inventors: Chun-Wei LIAO, Pen-Hsin CHOU
  • Publication number: 20240382994
    Abstract: A method for a semiconductor manufacturing process includes circulating a solution from a tank using a pump and receiving the solution from the pump at an inlet of a valve. When a manufacturing operation occurs, the solution is directed to a first outlet of the valve that is connected to a nozzle used in the manufacturing operation. When the manufacturing operation is idle, the solution is directed to a second outlet connected to a recirculation path; and recirculated back to the tank via the recirculation path for re-use in the manufacturing operation.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-wei LIAO, Tung-Hung FENG, Hui-Chun LEE, Shih-Che WANG
  • Patent number: 12087580
    Abstract: In a method of manufacturing a semiconductor device, a hydrophobic solvent as a gas is directed to flow over a bevel region of a wafer. A layer of the hydrophobic solvent is deposited on an upper bevel of the bevel region on top surface of the wafer and on a lower bevel of the bevel region on bottom surface of the wafer. A metal-containing photo resist layer is disposed on an internal region of the top surface of the wafer enclosed by the bevel region. During a subsequent processing operation, a photo resist material of the metal-containing photo resist layer is blocked off inside the top surface of the wafer by the layer of the hydrophobic solvent.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: September 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Wei Liao, Tung-Hung Feng, Hui-Chun Lee
  • Patent number: 12025919
    Abstract: A method for manufacturing a semiconductor device includes forming a forming a photoresist layer over a semiconductor substrate and selectively exposing the photoresist layer to actinic radiation. After selectively exposing the photoresist layer to actinic radiation, storing the semiconductor substrate in a semiconductor substrate container under an ambient of extreme dry clean air or inert gas. The method also includes after the storing the semiconductor substrate, performing a first heating of the photoresist layer.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: July 2, 2024
    Inventors: Chun-Wei Liao, Sheng-Wen Jiang, Jan-Liang Yang, Hui-Chun Lee
  • Publication number: 20230389294
    Abstract: A transistor includes: a substrate including an active area; a gate structure penetrating through the active area and including a gate and a gate dielectric layer, in which the gate dielectric layer covers sidewalls and a bottom of the gate; a channel layer located on a side of the gate dielectric layer away from the gate, in which the channel layer includes a metal oxide semiconductor layer, in which the active area includes a first active layer and a second active layer located at two sides of the gate structure, and the first active layer and the second active layer are in contact with the channel layer.
    Type: Application
    Filed: January 7, 2023
    Publication date: November 30, 2023
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: CHUN-WEI LIAO, Xiaoguang WANG, Deyuan XIAO, TZUNG-HAN LEE
  • Publication number: 20230386837
    Abstract: A system for manufacturing a semiconductor device comprises an edge coating device. The edge coating device comprises a first stage, a first shielding disk, one or more first openings, one or more second openings, and a resist dispensing module.
    Type: Application
    Filed: August 10, 2023
    Publication date: November 30, 2023
    Inventors: Chun-Wei LIAO, Tung-Hung FENG, Hui-Chun LEE
  • Patent number: 11798800
    Abstract: A solvent recycle system minimizes chemical consumption used in various semiconductor processes. The solvent is recycled from a nozzle bath via the addition of buffer tank to connect the bath and circulation pumps. Improvements to the bath design further maintain solvent cleanness by preventing intrusion of particles and overflow conditions in the bath.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: October 24, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Wei Liao, Tung-Hung Feng, Hui-Chun Lee, Shih-Che Wang
  • Publication number: 20230108126
    Abstract: A method for manufacturing a semiconductor device includes forming a forming a photoresist layer over a semiconductor substrate and selectively exposing the photoresist layer to actinic radiation. After selectively exposing the photoresist layer to actinic radiation, storing the semiconductor substrate in a semiconductor substrate container under an ambient of extreme dry clean air or inert gas. The method also includes after the storing the semiconductor substrate, performing a first heating of the photoresist layer.
    Type: Application
    Filed: August 8, 2022
    Publication date: April 6, 2023
    Inventors: Chun-Wei LIAO, Sheng-Wen JIANG, Jan-Liang YANG, Hui-Chun LEE
  • Publication number: 20230063235
    Abstract: In a method of manufacturing a semiconductor device, a hydrophobic solvent as a gas is directed to flow over a bevel region of a wafer. A layer of the hydrophobic solvent is deposited on an upper bevel of the bevel region on top surface of the wafer and on a lower bevel of the bevel region on bottom surface of the wafer. A metal-containing photo resist layer is disposed on an internal region of the top surface of the wafer enclosed by the bevel region. During a subsequent processing operation, a photo resist material of the metal-containing photo resist layer is blocked off inside the top surface of the wafer by the layer of the hydrophobic solvent.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Chun-Wei LIAO, Tung-Hung FENG, Hui-Chun LEE
  • Publication number: 20230043243
    Abstract: A method of operating a wet process apparatus, includes dispensing a solution from a nozzle and directing the solution to a bath through an inlet port. A purge gas is injected into the bath to force flow of the solution from the bath to a buffer tank. A condition of the fluid within the buffer tank is monitored with a sensor. The solution is circulated to a pump and then through a filter before returning the solution to the nozzle. Overflow solution is directed out of the bath via an overflow path to a drain for preventing an overflow condition.
    Type: Application
    Filed: October 17, 2022
    Publication date: February 9, 2023
    Inventors: Chun-Wei LIAO, Tung-Hung FENG, Hui-Chun LEE, Shih-Che WANG
  • Publication number: 20230010749
    Abstract: A solution dispense system for a semiconductor manufacturing process includes a longer circulation loop in order to minimize the idle section from resist pump to dispense nozzle. A t-valve and control valve are disposed close to the nozzle in order to decrease the idle section and reduce material consumption.
    Type: Application
    Filed: July 9, 2021
    Publication date: January 12, 2023
    Inventors: Chun-Wei LIAO, Tung-Hung FENG, Hui-Chun LEE, Shih-Che WANG
  • Publication number: 20220415646
    Abstract: A solvent recycle system minimizes chemical consumption used in various semiconductor processes. The solvent is recycled from a nozzle bath via the addition of buffer tank to connect the bath and circulation pumps. Improvements to the bath design further maintain solvent cleanness by preventing intrusion of particles and overflow conditions in the bath.
    Type: Application
    Filed: June 25, 2021
    Publication date: December 29, 2022
    Inventors: Chun-Wei LIAO, Tung-Hung FENG, Hui-Chun LEE, Shih-Che WANG
  • Publication number: 20220405140
    Abstract: A security system is disclosed. The security system includes a memory and a processor. The memory is configured to store several applications, in which several applications include several relationships. The processor is coupled to the memory, in which the processor is configured to manage several applications according to several relationships and at least one of a time driven method and an event driven method, in which the several relationships include a parent-child relationship, a function-group relationship, and an app-type relationship, to receive several input signals from several sources, and to display a screen picture of the several input signals according to several drawing parameters, and when several applications are running, the processor is further configured to allocate several resources of the security system to several applications according to several weighting values.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 22, 2022
    Inventors: Kai-Shian MOOI, Chun-Wei LIAO
  • Publication number: 20220405139
    Abstract: A virtual hardware management device is provided, which includes a memory and a processing unit. The processing unit is configured for executing the multiple instructions to perform the following operations: when detecting that the load rate is more than the high level threshold, comparing respective priorities of multiple processing flows; selecting at least one of the multiple processing flows to perform at least one of analysis frequency reduction processing, detection reduction processing, or flow pause processing according to a comparing result until the load rate is not more than the high level threshold; and generating respective resource allocation ratio of multiple operators in the multiple processing flows according to respective resource weights of the multiple operators, and using a virtual hardware unit to execute the multiple operators according to the multiple resource allocation ratios.
    Type: Application
    Filed: June 17, 2022
    Publication date: December 22, 2022
    Inventors: Kai-Shian MOOI, Chun-Wei LIAO
  • Patent number: 11532559
    Abstract: A semiconductor device includes a first dielectric layer, a cobalt-containing conductive feature, a non-cobalt conductive feature, a second dielectric layer, a first tungsten contact feature, a second tungsten contact feature, and a tungsten barrier layer. The cobalt-containing conductive feature is disposed in the first dielectric layer. The non-cobalt conductive feature is disposed in the first dielectric layer, and is spaced apart from the cobalt-containing conductive feature. The second dielectric layer is disposed over the first dielectric layer. The first tungsten contact feature is disposed in the second dielectric layer, and is electrically connected to the cobalt-containing conductive feature. The second tungsten contact feature is disposed in the second dielectric layer, and is electrically connected to the non-cobalt conductive feature.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun-Jhen Liao, Huei-Shan Wu, Chun-Wei Liao, Yi-Lii Huang
  • Publication number: 20220293587
    Abstract: The present disclosure in various embodiments provides a hardened resist layer that can reduce resist scum defects in a resist layer. In one embodiment, a lithography method is provided. The method includes forming a resist layer over a substrate, performing an exposure process on the resist layer, performing a developing process on the resist layer to form a patterned resist layer having a plurality resist segments, exposing the patterned resist layer to a vacuum ultraviolet (VUV) radiation, and subjecting the resist pattern a de-scum process.
    Type: Application
    Filed: March 11, 2021
    Publication date: September 15, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Wei LIAO, Hui-Chun LEE
  • Publication number: 20220270980
    Abstract: A semiconductor device includes a first dielectric layer, a cobalt-containing conductive feature, a non-cobalt conductive feature, a second dielectric layer, a first tungsten contact feature, a second tungsten contact feature, and a tungsten barrier layer. The cobalt-containing conductive feature is disposed in the first dielectric layer. The non-cobalt conductive feature is disposed in the first dielectric layer, and is spaced apart from the cobalt-containing conductive feature. The second dielectric layer is disposed over the first dielectric layer. The first tungsten contact feature is disposed in the second dielectric layer, and is electrically connected to the cobalt-containing conductive feature. The second tungsten contact feature is disposed in the second dielectric layer, and is electrically connected to the non-cobalt conductive feature.
    Type: Application
    Filed: February 25, 2021
    Publication date: August 25, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yun-Jhen LIAO, Huei-Shan WU, Chun-Wei LIAO, Yi-Lii HUANG
  • Publication number: 20200174374
    Abstract: A method for manufacturing a semiconductor device includes forming a forming a photoresist layer over a semiconductor substrate and selectively exposing the photoresist layer to actinic radiation. After selectively exposing the photoresist layer to actinic radiation, storing the semiconductor substrate in a semiconductor substrate container under an ambient of extreme dry clean air or inert gas. The method also includes after the storing the semiconductor substrate, performing a first heating of the photoresist layer.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 4, 2020
    Inventors: Chun-Wei LIAO, Sheng-Wen Jiang, Jan-Liang YANG, Hui-Chun LEE
  • Patent number: 8412007
    Abstract: The present invention relates to a 3-D waveguide coupling device capable of two-step coupling and a manufacture method thereof, the 3-D waveguide coupling device comprises: a first substrate, at least one waveguide layer, at least one assisting grating, at least one coupling material layer, and at least one 3-D tapered structure layer, wherein 3-D waveguide coupling device is able to couple the light into the waveguide layer by way of two-step coupling through the 3-D tapered structure layer, the coupling material layer and the assisting grating. Moreover, the light can also be coupled out from the waveguide layer through the assisting grating, the coupling layer, and the 3-D tapered structure. The manufacture method is adapted to fabricate the 3-D waveguide coupling device capable of two-step coupling via the present semiconductor process technology without increasing any other new equipment.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: April 2, 2013
    Assignee: National Tsing Hua University
    Inventors: Ming-Chang Lee, Yao-Tsu Yang, Chun-Wei Liao, Sheng-Wen Huang
  • Patent number: 8347896
    Abstract: An artificial eyelash structure includes a mounting member having a bonding portion for adhering to an eyelid and a bendable portion for enabling the bonding portion to be curved into a smoothly arched shape when bending the bonding portion upwards or downwards, and multiple eyelashes connected with the mounting member. The artificial eyelash structure is prepared by: forming a mounting member from a thin film, and then processing the thin film of the mounting member into a bonding portion and a bendable portion such that the bendable portion enables the bonding portion to be bent upwards or downwards, and then connecting eyelashes with the mounting member.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: January 8, 2013
    Inventor: Chun-Wei Liao