Patents by Inventor Chun-Wei Lu
Chun-Wei Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12087771Abstract: A semiconductor device is provided. The semiconductor device includes first channel nanostructures in a first device region, second channel nanostructures in a second device region, a dielectric fin at a boundary between the first device region and the second device region, a high-k dielectric layer surrounding each of the first channel nanostructures and each of the second channel nanostructures and over the dielectric fin, a first work function layer surrounding each of the first channel nanostructures and over the high-k dielectric layer and a second work function layer surrounding each of the second channel nanostructures and over the high-k dielectric layer and the first work function layer. The first work functional layer fully fills spaces between the first channel nanostructures and has an edge located above the dielectric fin. The second work functional layer fully fills spaces between the second channel nanostructures.Type: GrantFiled: September 15, 2021Date of Patent: September 10, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Chun-Fu Lu, Kuo-Cheng Chiang, Kuan-Lun Cheng, Chih-Hao Wang
-
Publication number: 20240274636Abstract: A pixel sensor array of an image sensor device described herein may include a deep trench isolation (DTI) structure that includes a plurality of DTI portions that extend into a substrate of the image sensor device. Two or more subsets of the plurality of DTI portions may extend around photodiodes of a pixel sensor of the pixel sensor array, and may extend into the substrate to different depths. The different depths enable the photocurrents generated by the photodiodes to be binned and used to generate unified photocurrent. In particular, the different depths enable photons to intermix in the photodiodes, which enables quadradic phase detection (QPD) binning for increased PDAF performance. The increased PDAF performance may include increased autofocus speed, increased high dynamic range, increased quantum efficiency (QE), and/or increased full well conversion (FWC), among other examples.Type: ApplicationFiled: February 15, 2023Publication date: August 15, 2024Inventors: Ming-Hsien YANG, Chun-Hao CHOU, Kuo-Cheng LEE, Chien Nan TU, Chun-Wei CHIA, Tse-Yu TU, Ya-Min HUNG, Cheng-Hao CHIU, Chun-Liang LU
-
Publication number: 20240272537Abstract: An illumination system configured to provide an illumination light is provided. The illumination system includes a light source, a light-homogenizing device, and a light-homogenizing element. The light source includes multiple light-emitting units, and the light-emitting units emit multiple light beams respectively. The light-homogenizing device includes a micro-lens-array element. The micro-lens-array element includes multiple micro lenses, and each of the light beams irradiates at least two of the micro lenses. The light beams are totally overlapped, non-overlapped, or partially overlapped with each other before being incident on the light-homogenizing device, and overlapped with each other on an incident surface of the light-homogenizing element. A projection device is also provided.Type: ApplicationFiled: February 5, 2024Publication date: August 15, 2024Applicant: Coretronic CorporationInventors: Chun-Hsin Lu, Jen-Wei Kuo, Wen-Chieh Chung
-
Patent number: 12056432Abstract: The present disclosure describes an example method for routing a standard cell with multiple pins. The method can include modifying a dimension of a pin of the standard cell, where the pin is spaced at an increased distance from a boundary of the standard cell than an original position of the pin. The method also includes routing an interconnect from the pin to a via placed on a pin track located between the pin and the boundary and inserting a keep out area between the interconnect and a pin from an adjacent standard cell. The method further includes verifying that the keep out area separates the interconnect from the pin from the adjacent standard cell by at least a predetermined distance.Type: GrantFiled: April 13, 2023Date of Patent: August 6, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Fong-yuan Chang, Chun-Chen Chen, Sheng-Hsiung Chen, Ting-Wei Chiang, Chung-Te Lin, Jung-Chan Yang, Lee-Chung Lu, Po-Hsiang Huang
-
Publication number: 20240249494Abstract: An environment managing and monitoring system and a method using same are provided. The environment managing and monitoring system is configured to assist monitors to obtain real-time information of the monitoring field and control device in the monitoring field. The environmental managing and monitoring system includes at least one sub-system and a host system. The host system is configured to output a region of interest condition and a monitoring condition to the sub-system, wherein the sub-system is configured to generate monitoring results according to the monitoring conditions, and selects an image range from the captured wide-angle dynamic real-time images according to the region of interest condition.Type: ApplicationFiled: September 4, 2023Publication date: July 25, 2024Inventors: Yung-tai SU, Hsin-lung HSIEH, Yu-hsuan LIAO, Yu-min CHUANG, Pang-tzu LIU, Chun-yueh CHEN, Jia-hao LU, Cheng-ju HSUIEH, Ching-wei LEE, Tsung-hsun TSAI, Po-yuan KUO, Po-yi WU, Chen-wei CHOU
-
Patent number: 12046480Abstract: A method of manufacturing a semiconductor device includes providing a semiconductor die and surrounding a sidewall of the semiconductor die with a dielectric material. The method further includes forming a post passivation interconnect (PPI) over the semiconductor die and electrically coupling the PPI with the semiconductor die. The method further includes molding the semiconductor die and the PPI into an integrated semiconductor package. The method further includes covering at least a portion of an outer surface of the integrated semiconductor package with a conductive layer, wherein the conductive layer is conformal to the morphology of the portion of the outer surface. Moreover, the method further includes forming a conductive path inside the integrated semiconductor package electrically coupled to the conductive layer and a ground terminal of the integrated semiconductor package.Type: GrantFiled: July 27, 2020Date of Patent: July 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Shou Zen Chang, Chun-Lin Lu, Kai-Chiang Wu, Ching-Feng Yang, Vincent Chen, Chuei-Tang Wang, Yen-Ping Wang, Hsien-Wei Chen, Wei-Ting Lin
-
Publication number: 20240243186Abstract: A method for forming a semiconductor device structure includes forming nanostructures in a first region and a second region over a substrate. The method also includes forming a gate dielectric layer surrounding the nanostructures. The method also includes forming dummy structures between the nanostructures. The method also includes forming a dielectric layer over the nanostructures. The method also includes forming a dielectric structure between the nanostructures in the first region and nanostructures in the second region. The method also includes removing the dummy structures in the first region. The method also includes depositing a first work function layer over the nanostructures. The method also includes removing the first work function layer and the dummy structures in the second region. The method also includes depositing a second work function layer over the nanostructures.Type: ApplicationFiled: January 17, 2023Publication date: July 18, 2024Inventors: Chun-Fu LU, Lung-Kun CHU, Jia-Ni YU, Mao-Lin HUANG, Chung-Wei HSU, Kuo-Cheng CHIANG, Chih-Hao WANG
-
Publication number: 20240243124Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first gate structure on a substrate and then forming a first epitaxial layer adjacent to the first gate structure. Preferably, a top surface of the first epitaxial layer includes a first curve, a second curve, and a third curve connecting the first curve and the second curve, in which the first curve and the second curve include curves concave downward while the third curve includes a curve concave upward.Type: ApplicationFiled: February 15, 2023Publication date: July 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chih-Wei Yang, Shih-Min Lu, Chi-Sheng Tseng, Yao-Jhan Wang, Chun-Hsien Lin
-
Publication number: 20230362488Abstract: A clamping device, an electronic device, and a remote control method of the electronic device. The clamping device includes a clamping unit, a first communication unit, and a control unit. The clamping unit is suitable for clamping the electronic device. The first communication unit is suitable for pairing with a second communication unit of the electronic device. The control unit is coupled to the clamping unit and the first communication unit. When the clamping unit is switched from an off mode to an on mode, the control unit controls the first communication unit to pair with the second communication unit and sends a screen-off command to the second communication unit via the first communication unit after the pairing is completed. When the clamping unit is in a clamping mode, the control unit sends an application open command to the second communication unit via the first communication unit.Type: ApplicationFiled: October 20, 2022Publication date: November 9, 2023Applicant: ASUSTeK COMPUTER INC.Inventors: Yea-Chin Yeh, Chi-Hwa Ho, Yi-Teng Tsai, Chun-Wei Lu
-
Publication number: 20230293460Abstract: The present invention relates to methods for treating dermatitis and the use of a ?-1 adrenoceptor antagonist in manufacturing a pharmaceutical composition for treating dermatitis. The methods comprise the step of administering the pharmaceutical composition comprising a therapeutically effective amount of ?-1 adrenoceptor antagonist to a subject in need thereof.Type: ApplicationFiled: August 13, 2021Publication date: September 21, 2023Inventors: Chun-Wei LU, Wen-Hung CHUNG, Yu-Shien KO, Jong-Hwei SU PANG
-
Publication number: 20230248671Abstract: The present invention relates to the use of ?-1 adrenergic receptor antagonist to prepare compositions for reducing or preventing damage to normal epithelial cells induced by epidermal growth factor receptor inhibitor (EGFRI) and inhibiting cancer cells, by administering a composition containing a ?-1 adrenergic receptor antagonist to reduce damage to normal epithelial cells induced by the EGFRI. The composition comprising ?-1 adrenergic receptor antagonist is administered to reduce damage to normal epithelial cells induced by the EGFRI. The composition comprising ?-1 adrenergic receptor antagonist can be administered together with an epidermal growth factor receptor inhibitor to synergistically inhibit cancer cells.Type: ApplicationFiled: July 8, 2021Publication date: August 10, 2023Inventors: Chun-Wei LU, Jong-Hwei SU PANG, Yu-Shien KO, Wen-Hung CHUNG, Mei-Jun CHEN
-
Publication number: 20230076745Abstract: A method for assessing the risk of cutaneous adverse drug reactions (CADRs) caused by an epidermal growth factor receptor inhibitor is provided, wherein the CADRs comprises but not limited to: maculopapular eruption (MPE), erythema multiforme (EM), Stevens Johnson syndrome (SJS), toxic epidermal necrolysis (TEN), and drug rash with eosinophilia and systemic symptoms (DRESS). Also provided is a detection kit for assessing the risk of developing CADRs in patients, said kit comprising a reagent for determining specific HLA alleles and a use of the detection kit in assessing the risk of developing CADR in a patient.Type: ApplicationFiled: August 16, 2019Publication date: March 9, 2023Inventors: Wen-Hung CHUNG, Shuen-Iu HUNG, Chun-Bing CHEN, Chun-Wei LU, Chuang-Wei WANG
-
Patent number: 11243591Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system has a plurality of function blocks which form a topology structure of the uninterruptible power system. The uninterruptible power system comprises a sensing circuit and a control circuit. The sensing circuit is configured to sense the function blocks and to generate a sensing data accordingly. The control circuit is configured to determine, according to the sensing data, whether an event occurs in any of the function blocks. When the determination is yes, the control circuit generates an event code corresponding to the event and outputs a control command accordingly. The control command is used to control a display interface to display the event code, and is used to control the display interface to send a prompt message through a function block graphic symbol corresponding to the event code in the displayed topology structure.Type: GrantFiled: November 6, 2019Date of Patent: February 8, 2022Assignee: CYBER POWER SYSTEMS, INC.Inventors: Chao-Ching Yang, Chun-Wei Lu
-
Publication number: 20220000807Abstract: Methods for treating a wound or promote wound healing are provided, comprising the step of administering a composition including an effective amount of ?-1 adrenergic receptor antagonist to a subject in need thereof. Also provided is apparatus for wound healing, comprising a dressing and a composition including an effective amount of ?-1 adrenergic receptor antagonist.Type: ApplicationFiled: September 21, 2021Publication date: January 6, 2022Inventors: Chun-Wei Lu, Jong-Hwei Su Pang, Yu-Shien Ko, Wen-Hung Chung, Chao-Kai Hsu
-
Patent number: 11154518Abstract: Methods for treating a wound or promote wound healing are provided, comprising the step of administering a composition including an effective amount of ?-1 adrenergic receptor antagonist to a subject in need thereof. Also provided is apparatus for wound healing, comprising a dressing and a composition including an effective amount of ?-1 adrenergic receptor antagonist.Type: GrantFiled: December 28, 2018Date of Patent: October 26, 2021Assignees: CHANG GUNG MEMORIAL HOSPITAL, LINKOU, CHANG GUNG UNIVERSITY, NATIONAL CHENG KUNG UNIVERSITYInventors: Chun-Wei Lu, Jong-Hwei Su Pang, Yu-Shien Ko, Wen-Hung Chung, Chao-Kai Hsu
-
Patent number: 11087434Abstract: An image processing apparatus and an image processing method are provided. The image processing apparatus includes a first memory, a plurality of image processing circuits, a first image processing circuit and dithering circuit. The first memory is utilized for storing an input frame. The image processing circuits are utilized for sequentially performing respective image processing operations on the input frame to generate a first intermediate frame. The first image processing circuit is utilized for performing a first image processing operation on the first intermediate frame to generate a second intermediate frame and writing the second intermediate frame into the first memory. The dithering circuit is utilized for performing a dithering operation on the second intermediate frame transmitted from the first image processing circuit to generate a first output frame and performing the dithering operation on the second intermediate frame read from the first memory to generate a second output frame.Type: GrantFiled: March 26, 2020Date of Patent: August 10, 2021Assignee: NOVATEK Microelectronics Corp.Inventors: Hua-Gang Chang, Chun-Wei Lu, Yu-Hsiung Yin
-
Publication number: 20200285290Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system has a plurality of function blocks which form a topology structure of the uninterruptible power system. The uninterruptible power system comprises a sensing circuit and a control circuit. The sensing circuit is configured to sense the function blocks and to generate a sensing data accordingly. The control circuit is configured to determine, according to the sensing data, whether an event occurs in any of the function blocks. When the determination is yes, the control circuit generates an event code corresponding to the event and outputs a control command accordingly. The control command is used to control a display interface to display the event code, and is used to control the display interface to send a prompt message through a function block graphic symbol corresponding to the event code in the displayed topology structure.Type: ApplicationFiled: November 6, 2019Publication date: September 10, 2020Inventors: CHAO-CHING YANG, CHUN-WEI LU
-
Publication number: 20200206164Abstract: Methods for treating a wound or promote wound healing are provided, comprising the step of administering a composition including an effective amount of ?-1 adrenergic receptor antagonist to a subject in need thereof. Also provided is apparatus for wound healing, comprising a dressing and a composition including an effective amount of ?-1 adrenergic receptor antagonist.Type: ApplicationFiled: December 28, 2018Publication date: July 2, 2020Inventors: Chun-Wei LU, Jong-Hwei SU PANG, Yu-Shien KO, Wen-Hung CHUNG, Chao-Kai HSU
-
Patent number: 10121613Abstract: A keyswitch device includes a base plate, a membrane circuit board, a light source, and a keyswitch assembly. The membrane circuit board is disposed on the base plate and includes a reflective film layer, a transmissive film layer, and a light guide spacer. The reflective film layer is located on the base plate. The transmissive film layer is located over the reflective film layer. The light guide spacer has an accommodating space. The reflective film layer and the transmissive film layer are respectively located at opposite sides of the light guide spacer. The light source is disposed between the reflective film layer and the transmissive film layer and located in the accommodating space. The keyswitch assembly is disposed on the membrane circuit board.Type: GrantFiled: August 12, 2016Date of Patent: November 6, 2018Assignee: Chicony Electronics Co., Ltd.Inventors: Pao-Chin Alan Chen, Ching-Cheng Tsai, Tsung-Min Chen, Pai-Hsiang Wang, Chun-Wei Lu
-
Publication number: 20180203229Abstract: The see-through eyepiece includes a first prism, a second prism, and a partially reflective layer. The first prism has an input surface, a flat first total internal reflection surface, and a first interface surface. The second prism has a second interface surface, a flat second total internal reflection surface, and a reflection surface. The partially reflective layer is disposed between the second interface surface and the first interface surface. The second and first prisms are attached together along the second and first interface surfaces, thereby forming the complete see-through eyepiece. The present invention is able to reduce the traversal distance of light within the prisms, effectively lowering the thickness of the see-through eyepiece, or enhancing its field or angle of view. A user may perceive images more easily and conveniently, achieving better product performance and applicability.Type: ApplicationFiled: January 13, 2017Publication date: July 19, 2018Inventors: Chun Wei Lu, Shiann Jang Wang, Wen-Lung Liang