Abstract: A method of forming a semiconductor device includes forming a first dielectric layer over a first channel region in a first region and over a second channel region in a second region; introducing a first dipole element into the first dielectric layer in the first region to form a first dipole-containing gate dielectric layer in the first region; forming a second dielectric layer over the first dipole-containing gate dielectric layer; introducing fluorine into the second dielectric layer to form a first fluorine-containing gate dielectric layer over the first dipole-containing gate dielectric layer; and forming a gate electrode over the first fluorine-containing gate dielectric layer.

Abstract: A semiconductor device structure and methods of forming the same are described. The structure includes a gate dielectric layer disposed over a substrate, a gate electrode layer disposed over the gate dielectric layer, and a first gate spacer disposed adjacent the gate dielectric layer, wherein the first gate spacer comprises an inner surface facing the gate dielectric layer and an outer surface opposite the inner surface, and the first gate spacer includes an oxygen concentration that decreases from the inner surface towards the outer surface of the first gate spacer.

Abstract: A stitching method for an exposure process includes following steps. A wafer is provided. The wafer includes interposer regions, each of which includes a logic chip region, a first memory chip region, and a second memory chip region. The logic chip region is located between the first and second memory chip regions. A photoresist layer is formed on the wafer. First exposure processes are performed on the photoresist layer by applying a first photomask to form first shot regions in the photoresist layer. Second exposure processes are performed on the photoresist layer by applying a second photomask to form second shot regions in the photoresist layer. The first shot regions and the second shot regions are arranged alternately in a first direction. The first shot regions and the second shot regions are overlapped to form stitching regions, each of which is not located in the logic chip region.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: A semiconductor device includes a channel portion disposed on and spaced apart from a substrate, a gate dielectric which includes an upper dielectric region disposed on the channel portion, a first inner gate structure disposed between the substrate and the upper dielectric region, and an outer gate structure including an outer work-function portion and a cap portion. The outer work-function portion covers the upper dielectric region and the first inner gate structure. The cap portion covers the outer work-function portion in a way that the cap portion is separated from the first inner gate structure. The first inner gate structure includes a first work-function material and a conductive material that is different from the first work-function material. The outer work-function portion includes a second work-function material that is different from the conductive material.

Abstract: A hub motor includes an axle, a stator, a rotor, a casing, a sleeve, and a mounting seat. The axle has a first end, a second end, and a bump protruding out of a radial-outer-side surface of the axle. The bump is located on a side close to the second end in the extension direction. The stator is fixed to the axle and is close to the first end. The rotor is sleeved on the axle and pivots around the stator with the axle as an axis. The casing is sleeved on the axle, is driven by the rotor to pivot with the axle serving as an axis, and accommodates the stator and the rotor. The sleeve is rotatably sleeved on the second end of the axle and is connected to the casing. The mounting seat is connected to the axle and sleeved on the bump.

Abstract: A hub motor includes an axle, a rotor, a stator, and a casing. The axle is fixed to a frame of a bicycle. The rotor is sleeved on the axle and pivots with the axle. The stator is fixed to the axle and adjacent to the rotor. The casing is sleeved on the axle and driven by the rotor to pivot with the axle. The casing has an accommodating space, a first perforation, and a second perforation. The accommodating space accommodates the stator and the rotor. The axle includes a first component and a second component. The first component is sleeved on the second component. The first component is arranged to pass through the first perforation. The second component is arranged to pass through the second perforation. The first component and the second component cannot rotate relative to each other after being sleeved.

Abstract: An integrated circuit includes a transistor having a plurality of stacked channels each extending between the source/drain regions of the transistor. The transistor also includes a hard mask nanostructure above the highest channel and extending between the source/drain regions of the transistor. A gate dielectric and gate metals wrap around the channels and the hard mask nanostructure.

Abstract: A semiconductor device includes a first wafer and a second wafer. The semiconductor device includes a seal ring structure comprising a first metal structure in a body of the first wafer, a second metal structure in the body of the first wafer, a third metal structure in a body of the second wafer, and a metal bonding structure including a first set of metal elements coupling the first metal structure and the third metal structure through an interface between the first wafer and the second wafer, and a second set of metal elements coupling the second metal structure and the third metal structure through the interface between the first wafer and the second wafer.

Abstract: A semiconductor device includes a first wafer comprising a first portion of a seal ring structure within a body of the first wafer. The semiconductor device includes a second wafer comprising a second portion of the seal ring structure within a body of the second wafer. The second wafer is affixed to the first wafer such that the second portion of the seal ring structure is on the first portion of the seal ring structure. The semiconductor device includes a trench structure comprising a first trench in the first wafer and a second trench in the second wafer, where the first trench and the second trench are on a same side of the seal ring structure.

Abstract: A clamping device, an electronic device, and a remote control method of the electronic device. The clamping device includes a clamping unit, a first communication unit, and a control unit. The clamping unit is suitable for clamping the electronic device. The first communication unit is suitable for pairing with a second communication unit of the electronic device. The control unit is coupled to the clamping unit and the first communication unit. When the clamping unit is switched from an off mode to an on mode, the control unit controls the first communication unit to pair with the second communication unit and sends a screen-off command to the second communication unit via the first communication unit after the pairing is completed. When the clamping unit is in a clamping mode, the control unit sends an application open command to the second communication unit via the first communication unit.

Abstract: A clamping device, an electronic device, and a remote control method of the electronic device. The clamping device includes a clamping unit, a first communication unit, and a control unit. The clamping unit is suitable for clamping the electronic device. The first communication unit is suitable for pairing with a second communication unit of the electronic device. The control unit is coupled to the clamping unit and the first communication unit. When the clamping unit is switched from an off mode to an on mode, the control unit controls the first communication unit to pair with the second communication unit and sends a screen-off command to the second communication unit via the first communication unit after the pairing is completed. When the clamping unit is in a clamping mode, the control unit sends an application open command to the second communication unit via the first communication unit.

Abstract: The present invention relates to methods for treating dermatitis and the use of a ?-1 adrenoceptor antagonist in manufacturing a pharmaceutical composition for treating dermatitis. The methods comprise the step of administering the pharmaceutical composition comprising a therapeutically effective amount of ?-1 adrenoceptor antagonist to a subject in need thereof.

Abstract: The present invention relates to the use of ?-1 adrenergic receptor antagonist to prepare compositions for reducing or preventing damage to normal epithelial cells induced by epidermal growth factor receptor inhibitor (EGFRI) and inhibiting cancer cells, by administering a composition containing a ?-1 adrenergic receptor antagonist to reduce damage to normal epithelial cells induced by the EGFRI. The composition comprising ?-1 adrenergic receptor antagonist is administered to reduce damage to normal epithelial cells induced by the EGFRI. The composition comprising ?-1 adrenergic receptor antagonist can be administered together with an epidermal growth factor receptor inhibitor to synergistically inhibit cancer cells.

Abstract: A method for assessing the risk of cutaneous adverse drug reactions (CADRs) caused by an epidermal growth factor receptor inhibitor is provided, wherein the CADRs comprises but not limited to: maculopapular eruption (MPE), erythema multiforme (EM), Stevens Johnson syndrome (SJS), toxic epidermal necrolysis (TEN), and drug rash with eosinophilia and systemic symptoms (DRESS). Also provided is a detection kit for assessing the risk of developing CADRs in patients, said kit comprising a reagent for determining specific HLA alleles and a use of the detection kit in assessing the risk of developing CADR in a patient.

Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system has a plurality of function blocks which form a topology structure of the uninterruptible power system. The uninterruptible power system comprises a sensing circuit and a control circuit. The sensing circuit is configured to sense the function blocks and to generate a sensing data accordingly. The control circuit is configured to determine, according to the sensing data, whether an event occurs in any of the function blocks. When the determination is yes, the control circuit generates an event code corresponding to the event and outputs a control command accordingly. The control command is used to control a display interface to display the event code, and is used to control the display interface to send a prompt message through a function block graphic symbol corresponding to the event code in the displayed topology structure.

Abstract: Methods for treating a wound or promote wound healing are provided, comprising the step of administering a composition including an effective amount of ?-1 adrenergic receptor antagonist to a subject in need thereof. Also provided is apparatus for wound healing, comprising a dressing and a composition including an effective amount of ?-1 adrenergic receptor antagonist.

Abstract: Methods for treating a wound or promote wound healing are provided, comprising the step of administering a composition including an effective amount of ?-1 adrenergic receptor antagonist to a subject in need thereof. Also provided is apparatus for wound healing, comprising a dressing and a composition including an effective amount of ?-1 adrenergic receptor antagonist.

Abstract: An image processing apparatus and an image processing method are provided. The image processing apparatus includes a first memory, a plurality of image processing circuits, a first image processing circuit and dithering circuit. The first memory is utilized for storing an input frame. The image processing circuits are utilized for sequentially performing respective image processing operations on the input frame to generate a first intermediate frame. The first image processing circuit is utilized for performing a first image processing operation on the first intermediate frame to generate a second intermediate frame and writing the second intermediate frame into the first memory. The dithering circuit is utilized for performing a dithering operation on the second intermediate frame transmitted from the first image processing circuit to generate a first output frame and performing the dithering operation on the second intermediate frame read from the first memory to generate a second output frame.

Abstract: An uninterruptible power system and an operation method thereof are provided. The uninterruptible power system has a plurality of function blocks which form a topology structure of the uninterruptible power system. The uninterruptible power system comprises a sensing circuit and a control circuit. The sensing circuit is configured to sense the function blocks and to generate a sensing data accordingly. The control circuit is configured to determine, according to the sensing data, whether an event occurs in any of the function blocks. When the determination is yes, the control circuit generates an event code corresponding to the event and outputs a control command accordingly. The control command is used to control a display interface to display the event code, and is used to control the display interface to send a prompt message through a function block graphic symbol corresponding to the event code in the displayed topology structure.