Abstract: A package structure including a semiconductor die, a redistribution circuit structure and an electronic device is provided. The semiconductor die is laterally encapsulated by an insulating encapsulation. The redistribution circuit structure is disposed on the semiconductor die and the insulating encapsulation. The redistribution circuit structure includes a colored dielectric layer, inter-dielectric layers and redistribution conductive layers embedded in the inter-dielectric layers. The electronic device is disposed over the colored dielectric layer and electrically connected to the redistribution circuit structure.

Abstract: A manufacturing method of a trench power semiconductor device is provided. The manufacturing method includes the steps of forming a protective layer on an epitaxial layer and forming a trench gate structure in a trench formed in an epitaxial layer. The trench gate structure includes a shielding electrode, a gate disposed on the shielding electrode and an inter-electrode dielectric layer disposed therebetween. The step of forming the trench gate structure includes forming an insulating layer covering an inner surface of the trench; and before the step of forming the inter-electrode dielectric layer, forming an initial spacing layer, the spacing layer including a first sidewall portion and a second sidewall portion, both of which include bottom end portions spaced apart from each other and extending portions protruding from the protective layer.

Abstract: The present disclosure provides a trench power semiconductor component and a manufacturing method thereof. The trench gate structure of the trench power semiconductor component is located in the at least one cell trench that is formed in an epitaxial layer. The trench gate structure includes a shielding electrode, a gate electrode disposed above the shielding electrode, an insulating layer, an intermediate dielectric layer, and an inner dielectric layer. The insulating layer covers the inner wall surface of the cell trench. The intermediate dielectric layer interposed between the shielding electrode and the insulating layer has a bottom opening. The inner dielectric layer interposed between the shielding electrode and the intermediate dielectric layer is made of a material different from that of the intermediate dielectric layer, and fills the bottom opening so that the space of the cell trench beneath the shielding electrode is filled with the same material.

Abstract: A manufacturing method of a trench power semiconductor device is provided. The manufacturing method includes the steps of forming a protective layer on an epitaxial layer and forming a trench gate structure in a trench formed in an epitaxial layer. The trench gate structure includes a shielding electrode, a gate disposed on the shielding electrode and an inter-electrode dielectric layer disposed therebetween. The step of forming the trench gate structure includes forming an insulating layer covering an inner surface of the trench; and before the step of forming the inter-electrode dielectric layer, forming an initial spacing layer, the spacing layer including a first sidewall portion and a second sidewall portion, both of which include bottom end portions spaced apart from each other and extending portions protruding from the protective layer.

Abstract: The present disclosure provides a trench power semiconductor component and a manufacturing method thereof. The trench gate structure of the trench power semiconductor component is located in the at least one cell trench that is formed in an epitaxial layer. The trench gate structure includes a shielding electrode, a gate electrode disposed above the shielding electrode, an insulating layer, an intermediate dielectric layer, and an inner dielectric layer. The insulating layer covers the inner wall surface of the cell trench. The intermediate dielectric layer interposed between the shielding electrode and the insulating layer has a bottom opening. The inner dielectric layer interposed between the shielding electrode and the intermediate dielectric layer is made of a material different from that of the intermediate dielectric layer, and fills the bottom opening so that the space of the cell trench beneath the shielding electrode is filled with the same material.

Abstract: A method for manufacturing trench MOSFET device with low gate charge includes the steps of providing a substrate of first conductivity type; forming an epitaxial layer of first conductivity type on the substrate; forming a body region of second conductivity type in the epitaxial layer, the body region extends downwards from the surface of the epitaxial layer; forming a plurality of trenches in the epitaxial layer, the body region having the trenches formed therethrough; forming a first insulating layer on the body region and on an inner surface of each trench; forming a ploy-silicon spacer on the first insulating layer on an inner side-wall of each trench; filling a dielectric structure in the lower portion of each trench; and filling a ploy-silicon structure on top of the dielectric structure in each trench. Through the trench MOSFET device, the gate capacitance and resistance thereof are reduced so the performance is increased.