Patents by Inventor Chun-Wei Yeh

Chun-Wei Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128211
    Abstract: Some implementations described herein provide techniques and apparatuses for a stacked semiconductor die package. The stacked semiconductor die package may include an upper semiconductor die package above a lower semiconductor die package. The stacked semiconductor die package includes one or more rows of pad structures located within a footprint of a semiconductor die of the lower semiconductor die package. The one or more rows of pad structures may be used to mount the upper semiconductor die package above the lower semiconductor die package. Relative to another stacked semiconductor die package including a row of dummy connection structures adjacent to the semiconductor die that may be used to mount the upper semiconductor die package, a size of the stacked semiconductor die package may be reduced.
    Type: Application
    Filed: April 27, 2023
    Publication date: April 18, 2024
    Inventors: Chih-Wei WU, An-Jhih SU, Hua-Wei TSENG, Ying-Ching SHIH, Wen-Chih CHIOU, Chun-Wei CHEN, Ming Shih YEH, Wei-Cheng WU, Der-Chyang YEH
  • Publication number: 20240113615
    Abstract: A Totem Pole PFC circuit includes at least one fast-switching leg, a slow-switching leg, and a control unit. Each fast-switching leg includes a fast-switching upper switch and a fast-switching lower switch. The slow-switching leg is coupled in parallel to the at least one fast-switching leg, and the slow-switching leg includes a slow-switching upper switch and a slow-switching lower switch. The control unit receives an AC voltage with a phase angle, and the control unit includes a current detection loop, a voltage detection loop, and a control loop. The control loop generates a second control signal assembly to respectively control the slow-switching upper switch and the slow-switching lower switch. The control loop controls the second control signal assembly to follow the phase angle, and dynamically adjusts a duty cycle of the second control signal assembly to turn on or turn off the slow-switching upper switch and the slow-switching lower switch.
    Type: Application
    Filed: February 22, 2023
    Publication date: April 4, 2024
    Inventors: Chun-Hao HUANG, Chun-Wei LIN, I-Hsiang SHIH, Ching-Nan WU, Jia-Wei YEH
  • Publication number: 20240105818
    Abstract: A semiconductor device includes a gate electrode over a channel region of a semiconductor fin, first spacers over the semiconductor fin, and second spacers over the semiconductor fin. A lower portion of the gate electrode is between the first spacers. An upper portion of the gate electrode is above the first spacers. The second spacers are adjacent the first spacers opposite the gate electrode. The upper portion of the gate electrode is between the second spacers.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 28, 2024
    Inventors: Jian-Jou Lian, Chun-Neng Lin, Ming-Hsi Yeh, Chieh-Wei Chen, Tzu-Ang Chiang
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11926266
    Abstract: An installing module includes a seat bracket, a plurality of lower gaskets, a device bracket and an upper gasket. The seat bracket includes a first locking plate and a second locking plate locked to each other. The first locking plate includes a first concave and the second locking plate includes a second concave corresponding to the first concave. The lower gaskets are respectively disposed on the first concave and the second concave. The lower gaskets face each other and jointly define a lower assembly hole and are disposed on a lower side of a head-support fixer of a car seat. The device bracket is locked to the seat bracket and an electronic device is pivotally coupled to the device bracket. The upper gasket is disposed between the device bracket and the head-support fixer, and the head-support fixer is clamped between the upper gasket and the lower gaskets.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: March 12, 2024
    Assignee: PEGATRON CORPORATION
    Inventors: Shih-Wei Yeh, Chien-Chih Lin, Yi-Ming Chou, Chun-Chieh Chang
  • Patent number: 11917772
    Abstract: A power supply with a separable communication module includes a casing with a port; a main board placed in the casing and having a power conversion circuit; a sub-board electrically connected to the power conversion circuit and provided with at least one first connector; and a communication module. The power conversion circuit has at least one electrical connection terminal. A first interface of the first connector faces the port. The communication module includes a first circuit board and a communication circuit disposed on the first circuit board, the first circuit board has an electrical connection part electrically connected to the communication circuit, the electrical connection part has a first state of connecting with the first interface, and a second state of detaching from the first interface.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: February 27, 2024
    Assignee: COTEK ELECTRONIC IND. CO., LTD.
    Inventors: Chun-Wei Wu, Ta-Chang Wei, Chung-Liang Tsai, Shou-Cheng Yeh
  • Patent number: 11747671
    Abstract: A display device enabling external objects to be shown therein comprises a main body formed with a space, a backlight module disposed in the space and a display module disposed in the space. The backlight module comprises a light projection surface, the display and backlight modules are separately disposed by a spacing for at least one external object to locate therein. The display module comprises a transparent display structure, a first optical film disposed on one side of the transparent display structure facing the surface, and a second optical film disposed on the other side. The first optical film enables a light projected by the backlight module and a light reflected by the main body to pass through. The second optical film enables a light from the transparent display structure to pass through, and reflects an ambient light outside the main body.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: September 5, 2023
    Assignee: HIGGSTEC INC.
    Inventors: Tzu-Chien Lin, Chun-Wei Yeh, Hung-Yu Tsai
  • Patent number: 11209942
    Abstract: A method for manufacturing capacitive touch control panel and a capacitive touch control panel are provided. The method includes forming a sensing circuit on a substrate and then forming a communicating structure on the substrate. The communicating structure is conductive, and is disposed to be near at least two adjacent side walls of the substrate. A gap is formed between the communicating structure and the plurality of the sensing electrodes that are near the communicating structure. The next step is to form a plurality of bridging structures for connecting the plurality of the sensing electrodes and the communicating structure. The last step is to remove a portion of the communicating structure by laser cutting to form a plurality of output cables.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: December 28, 2021
    Assignee: HIGGSTEC INC.
    Inventors: Chun-Wei Yeh, Sheng-Liang Lin, Yi-Han Wang, Hung-Yu Tsai
  • Publication number: 20210019002
    Abstract: A method for manufacturing capacitive touch control panel and a capacitive touch control panel are provided. The method includes forming a sensing circuit on a substrate and then forming a communicating structure on the substrate. The communicating structure is conductive, and is disposed to be near at least two adjacent side walls of the substrate. A gap is formed between the communicating structure and the plurality of the sensing electrodes that are near the communicating structure. The next step is to form a plurality of bridging structures for connecting the plurality of the sensing electrodes and the communicating structure. The last step is to remove a portion of the communicating structure by laser cutting to form a plurality of output cables.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 21, 2021
    Inventors: CHUN-WEI YEH, SHENG-LIANG LIN, YI-HAN WANG, HUNG-YU TSAI
  • Patent number: 10802638
    Abstract: A touch display device includes a display module, a touch module and a light-transmitting substrate. The display module has a display surface and a bottom surface opposite to the display surface. The touch module is fixed to the display surface by an adhesive. The adhesive, the touch module and the display surface jointly define an accommodating space between the display module and the touch module. The light-transmitting substrate is disposed in the accommodating space. One side of the light-transmitting substrate is fixed to the display surface by a first optical adhesive, and the other side of the light-transmitting substrate is fixed to the touch module by a second optical adhesive. An adhesive strength of the adhesive is higher than an adhesive strength of the first optical adhesive, and the adhesive strength of the adhesive is higher than an adhesive strength of the second optical adhesive.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: October 13, 2020
    Assignee: HIGGSTEC INC.
    Inventors: Chun-Wei Yeh, Sheng-Liang Lin, Yi-Han Wang, Hung-Yu Tsai
  • Publication number: 20190391622
    Abstract: A computer case including a frame, a motherboard stand and a motherboard extension stand is provided. The frame includes a front plate, a rear plate, a top plate and a bottom plate. The motherboard stand is adjacent to the top plate and the rear plate. The motherboard extension stand is connected to the motherboard stand and has a first position or a second position. When the motherboard extension stand is located at the first position, the motherboard extension stand and the motherboard stand are disposed in parallel, and two sides of the motherboard extension stand are respectively connected to the motherboard stand and the front plate. When the motherboard extension stand is located at the second position, the motherboard extension stand is parallel to the front plate and the rear plate, and located between the front plate and the rear plate.
    Type: Application
    Filed: March 25, 2019
    Publication date: December 26, 2019
    Inventors: Chin-Pang HSU, Hung-Hsing CHIU, Chia-Hsiang KAO, Chun-Wei YEH
  • Patent number: 10514733
    Abstract: A computer case including a frame, a motherboard stand and a motherboard extension stand is provided. The frame includes a front plate, a rear plate, a top plate and a bottom plate. The motherboard stand is adjacent to the top plate and the rear plate. The motherboard extension stand is connected to the motherboard stand and has a first position or a second position. When the motherboard extension stand is located at the first position, the motherboard extension stand and the motherboard stand are disposed in parallel, and two sides of the motherboard extension stand are respectively connected to the motherboard stand and the front plate. When the motherboard extension stand is located at the second position, the motherboard extension stand is parallel to the front plate and the rear plate, and located between the front plate and the rear plate.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: December 24, 2019
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, LITE-ON TECHNOLOGY CORPORATION
    Inventors: Chin-Pang Hsu, Hung-Hsing Chiu, Chia-Hsiang Kao, Chun-Wei Yeh
  • Patent number: 9524944
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion d having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: December 20, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang
  • Publication number: 20160247773
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have, a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion d having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Application
    Filed: May 2, 2016
    Publication date: August 25, 2016
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang
  • Patent number: 9362245
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: June 7, 2016
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang
  • Publication number: 20140327131
    Abstract: A package structure is disclosed, which includes a substrate having a body, a plurality of conductive pads formed on the body and a surface passivation layer formed on the body and having a plurality of openings for exposing the conductive pads; a plurality of conductive vias formed in the openings of the surface passivation layer and electrically connected to the conductive pads; a plurality of circuits formed on the surface passivation layer and electrically connected to the conductive vias, wherein the circuits have a plurality of electrical contacts; at least a pattern portion formed on the surface passivation layer and intersecting with the circuits; and a second passivation layer formed on the surface passivation layer, the circuits and the pattern portion and having a plurality of openings for exposing portions of the electrical contacts of the circuits, thereby strengthening the bonding between the circuits and the passivation layers.
    Type: Application
    Filed: August 20, 2013
    Publication date: November 6, 2014
    Applicant: Siliconware Precision Industries Co., Ltd.
    Inventors: Chun-Wei Yeh, Chun-Hsien Shen, Hsiu-Jung Li, Ya-Yi Lai, Fu-Tang Huang