Patents by Inventor Chun Wei

Chun Wei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200343282
    Abstract: A device including a semiconductive substrate having opposite first and second surfaces, a light-sensitive element in the semiconductive substrate, an isolation structure extending at least from the second surface of the semiconductive substrate to within the semiconductive substrate, and a color filter over the second surface of the semiconductive substrate. The isolation structure includes a dielectric fill and a first high-k dielectric layer wrapping around the dielectric fill.
    Type: Application
    Filed: July 11, 2020
    Publication date: October 29, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yun-Wei CHENG, Chun-Wei CHIA, Chun-Hao CHOU, Kuo-Cheng LEE, Hsun-Ying HUANG
  • Patent number: 10817047
    Abstract: A tracking system is disclosed. The tracking system comprises a head-mounted display (HMD) worn on a head of a user and configured to virtualize a body movement of the user in a virtual environment; and a plurality of sensors worn on feet of the user configured to determine body information of the user according to the body movement of the user, and transmit the determined body information to the HMD; wherein the HMD virtualizes the body movement of the user according to the determined body information; wherein the body information is related to a plurality of mutual relationships between the plurality of sensors and the HMD.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: October 27, 2020
    Assignee: XRSpace CO., LTD.
    Inventors: Peter Chou, Chun-Wei Lin, Yi-Kang Hsieh, Chia-Wei Wu
  • Patent number: 10817452
    Abstract: A bus system is provided. The bus system includes a master device, an enhanced serial peripheral interface (eSPI) bus, a plurality of slave devices electrically connected to the master device via the eSPI bus, and a first resistor. Each slave device has an alert handshake pin. The alert handshake pins of the slave devices are electrically connected together via an alert handshake control line. The first resistor is coupled between the alert handshake control line and a power supply. Each slave device obtains the number of slave devices according to a first voltage of the alert handshake control line.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: October 27, 2020
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chih-Hung Huang, Chun-Wei Chiu, Hao-Yang Chang
  • Publication number: 20200334860
    Abstract: An apparatus for interactive image processing including a first camera, a second camera, an image processing circuit, a vision processing unit, an image signal processor, a central processing unit, and a memory device is disclosed. The present disclosure utilizes the image processing circuit to calculate depth data according to raw images generated by the first and second cameras at the front-end of the interactive image processing system, so as to ease the burden of depth calculation by the digital signal processor in the prior art.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 22, 2020
    Inventors: Yi-Kang Hsieh, Chun-Wei Lin, Cheng-Yu Hsu, Ching-Ning Huang
  • Publication number: 20200336729
    Abstract: An interactive image processing system including a first infrared camera, a second infrared camera, an image processing circuit, a vision processing unit, an image signal processor, a central processing unit, and a memory device is disclosed. The present disclosure calculates depth data according to infrared images generated by the first and second infrared cameras to improve depth quality.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 22, 2020
    Inventors: Yi-Kang Hsieh, Chun-Wei Lin, Cheng-Yu Hsu, Sheng-Hsiu Kuo
  • Publication number: 20200336655
    Abstract: An apparatus for interactive image processing including a first camera, a second camera, an image processing circuit, a vision processing unit, an image signal processor, a central processing unit, and a memory device is disclosed. The present disclosure utilizes the image processing circuit to calculate depth data according to raw images generated by the first and second cameras at the front-end of the interactive image processing system, so as to ease the burden of depth calculation by the digital signal processor in the prior art.
    Type: Application
    Filed: April 17, 2019
    Publication date: October 22, 2020
    Inventors: Yi-Kang Hsieh, Chun-Wei Lin, Cheng-Yu Hsu
  • Patent number: 10810396
    Abstract: A fingerprint identification apparatus and an electronic device having the fingerprint identification apparatus. The fingerprint identification apparatus includes: a first substrate; a second substrate disposed opposite to the first substrate; and a fingerprint identification sensor disposed between the first substrate and the second substrate, where the fingerprint identification sensor comprises a plurality of photoelectric induction units, and each of the photoelectric induction units comprises a curved photoelectric induction part.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: October 20, 2020
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yanan Jia, Haisheng Wang, Chun Wei Wu, Yingming Liu, Rui Xu, Lijun Zhao, Changfeng Li, Yuzhen Guo, Pengpeng Wang, Yanling Han, Xiaoliang Ding, Wei Liu, Jing Lv, Xue Dong
  • Publication number: 20200327836
    Abstract: A display panel includes multiple data lines, a scan lines, pixel circuit and a driving circuit. The data lines are configured to receive multiple data signals in a display period. There is a buffer period before the display period. The scan line is configured to receive a scan signal during the display period. The pixel circuit is electrically connected to the data lines and the scan line for receiving the data signals and the scan signal. The driving circuit is electrically connected to the data line, and configured to receive multiple charging signals during the buffer period. The charging signals are corresponding to the data lines and gradually increase so that the driving circuit charges the data lines according to the charging signals.
    Type: Application
    Filed: March 4, 2020
    Publication date: October 15, 2020
    Inventors: Chun-Wei CHANG, Jie-Chuan HUANG
  • Patent number: 10802630
    Abstract: The disclosure discloses an array substrate, a method for fabricating the same, a display panel, and a display device, and the array substrate includes: a base substrate, a pressure-sensitive component, a plurality of dual-gate transistors, and a plurality of pixel transistors, where the pressure-sensitive component includes a first electrode layer, a pressure-sensitive layer, and a second electrode layer which are arranged on the base substrate in that order, and the second electrode layer includes a plurality of second electrodes arranged corresponding to the respective dual-gate transistors in a one-to-one manner; and the dual-gate transistors and the pixel transistors are arranged above the second electrode layer, and each of the plurality of second electrodes is electrically connected with a bottom-gate electrode in a corresponding dual-gate transistor, so that a pressure can be detected.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: October 13, 2020
    Assignee: BOE TECHNOLOGY GROUP CO., LTD
    Inventors: Yuzhen Guo, Xue Dong, Haisheng Wang, Chun-wei Wu, Xueyou Cao, Yingming Liu, Xiaoliang Ding, Chih-Jen Cheng
  • Patent number: 10803343
    Abstract: A motion-aware keypoint selection system adaptable to iterative closest point (ICP) includes a pruning unit that receives an image and selects at least one region of interest (ROI) composed of a selected subset of points on the image; a point quality estimation unit that generates point quality of each point in the ROI according to a frame rate; and a suppression unit that receives the point quality and generates keypoints by screening the ROI.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: October 13, 2020
    Assignees: NCKU Research and Development Foundation, Himax Technologies Limited
    Inventors: Chun-Wei Chen, Wen-Yuan Hsiao, Ming-Der Shieh
  • Patent number: 10802638
    Abstract: A touch display device includes a display module, a touch module and a light-transmitting substrate. The display module has a display surface and a bottom surface opposite to the display surface. The touch module is fixed to the display surface by an adhesive. The adhesive, the touch module and the display surface jointly define an accommodating space between the display module and the touch module. The light-transmitting substrate is disposed in the accommodating space. One side of the light-transmitting substrate is fixed to the display surface by a first optical adhesive, and the other side of the light-transmitting substrate is fixed to the touch module by a second optical adhesive. An adhesive strength of the adhesive is higher than an adhesive strength of the first optical adhesive, and the adhesive strength of the adhesive is higher than an adhesive strength of the second optical adhesive.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: October 13, 2020
    Assignee: HIGGSTEC INC.
    Inventors: Chun-Wei Yeh, Sheng-Liang Lin, Yi-Han Wang, Hung-Yu Tsai
  • Publication number: 20200320373
    Abstract: An artificial neural network and method are provided. The method includes receiving a set of input voltages; converting a respective input voltage in said set of input voltages into a respective set of local currents using a voltage-to-current conversion; multiplying said respective set of local currents by a respective set of binary signals to establish a respective set of conditionally inverted currents; summing said respective set of conditionally inverted currents into a respective local current; summing all respective local currents into a global current; and converting the global current into an output voltage using a load circuit.
    Type: Application
    Filed: April 3, 2019
    Publication date: October 8, 2020
    Inventors: Chia-Liang (Leon) Lin, Shih-Chun Wei
  • Patent number: 10796194
    Abstract: A motion-aware keypoint selection system adaptable to iterative closest point (ICP) includes a pruning unit that receives an image and selects at least one region of interest (ROI) composed of a selected subset of points on the image; a point quality estimation unit that receives the ROI and generates point quality; and a suppression unit that receives the point quality and generates keypoints. In one embodiment, a near edge region (NER) is selected as the ROI. In another embodiment, the point quality estimation unit generates point quality according to point motion and point depth.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: October 6, 2020
    Assignees: NCKU Research and Development Foundation, Himaz Technologies Limited
    Inventors: Chun-Wei Chen, Wen-Yuan Hsiao, Ming-Der Shieh
  • Patent number: 10797091
    Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Seiji Takahashi, Chen-Jong Wang, Dun-Nian Yaung, Feng-Chi Hung, Feng-Jia Shiu, Jen-Cheng Liu, Jhy-Jyi Sze, Chun-Wei Chang, Wei-Cheng Hsu, Wei Chuang Wu, Yimin Huang
  • Patent number: 10797156
    Abstract: A method includes depositing a contact etch stop layer (CESL) over a gate, a source/drain (S/D) region and an isolation feature. The method includes performing a first chemical mechanical planarization (CMP) to expose the gate. The method further includes performing a second CMP using a slurry different from the first CMP to expose the CESL over the S/D region, wherein, following the second CMP, an entire top surface of the CESL over the S/D region and over the isolation feature is substantially level with a top surface of the gate.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: October 6, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Neng-Kuo Chen, Clement Hsingjen Wann, Yi-An Lin, Chun-Wei Chang, Sey-Ping Sun
  • Patent number: 10796943
    Abstract: A manufacturing method of a semiconductor structure includes the following steps. A patterned mask layer is formed on a semiconductor substrate. An isolation trench is formed in the semiconductor substrate by removing a part of the semiconductor substrate. A liner layer is conformally formed on an inner sidewall of the isolation trench. An implantation process is performed to the liner layer. The implantation process includes a noble gas implantation process. An isolation structure is at least partially formed in the isolation trench after the implantation process. An etching process is performed to remove the patterned mask layer after forming the isolation structure and expose a top surface of the semiconductor substrate. A part of the liner layer formed on the inner sidewall of the isolation trench is removed by the etching process. The implantation process is configured to modify the etch rate of the liner layer in the etching process.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: October 6, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Liang Ye, Chun-Wei Yu, Yu-Ren Wang, Shi-You Liu, Shao-Hua Hsu
  • Patent number: 10790375
    Abstract: A high electron mobility transistor (HEMT) includes a first compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A salicide source feature and a salicide drain feature are in contact with the first III-V compound layer through the second III-V compound layer. A gate electrode is disposed over a portion of the second compound layer between the salicide source feature and the salicide drain feature.
    Type: Grant
    Filed: April 25, 2019
    Date of Patent: September 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Fu-Wei Yao, Chen-Ju Yu, King-Yuen Wong, Chun-Wei Hsu, Jiun-Lei Jerry Yu, Fu-Chih Yang, Chun Lin Tsai
  • Publication number: 20200300416
    Abstract: A lighting apparatus comprises: a board, a plurality of light-emitting units disposed on the board, and a package structure enclosing all of the light-emitting units and having a volume less than 5000 mm3. The lighting apparatus has a light intensity greater than 150 lumens.
    Type: Application
    Filed: May 29, 2020
    Publication date: September 24, 2020
    Inventors: Wei-Chiang HU, Keng-Chuan CHANG, Chiu-Lin YAO, Chun-Wei LIN, Jung-Chang SUN
  • Publication number: 20200305126
    Abstract: A method and apparatus are disclosed from the perspective of a first device, wherein the first device is configured with a sidelink resource pool comprising a frequency region of sidelink data transmission and multiple frequency regions of sidelink feedback transmission, wherein the multiple frequency regions of sidelink feedback transmission in one TTI (Transmission Time Interval) are separately associated with the one frequency region of sidelink data transmission in multiple TTIs, and wherein the multiple frequency regions of sidelink feedback transmission in the one TTI are non-overlapped with each other in frequency domain and fully overlapped in time domain. In one embodiment, the method includes the first device receiving a sidelink data transmission from a second device within the frequency region of sidelink data transmission in a first TTI. The method further includes the first device generating a feedback information associated with the sidelink data transmission.
    Type: Application
    Filed: March 11, 2020
    Publication date: September 24, 2020
    Inventors: Ming-Che Li, Chun-Wei Huang
  • Patent number: D897829
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: October 6, 2020
    Assignee: WISTRON NEWEB CORP.
    Inventors: Lan-Chun Yang, Chun-Wei Wang, Yi-Chieh Lin, San-Yi Kuo