Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Abstract: A method includes providing a workpiece having a first conductive pad and a second conductive pad over a substrate, a topmost point of the second conductive pad is above that of the first conductive pad by a height difference, conformally forming a first etch stop layer on the first and the second conductive pads, forming a dielectric structure over the first etch stop layer, performing a planarization process to the dielectric structure, and after the performing of the planarization process, conformally depositing a dielectric layer over the workpiece, the dielectric layer including a first portion disposed directly over the first conductive pad and a second portion disposed directly over the second conductive pad, where a thickness difference between a thickness of the first portion of the dielectric layer and a thickness of the second portion of the dielectric layer is less than the height difference.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes an isolation feature formed over a substrate that includes a first fin and a second fin separated from each other by the isolation feature. The semiconductor device structure also includes an insulating fin structure formed in the isolation feature between the first fin and the second fin. The insulating fin structure includes a first insulating fin base partially formed within the isolation feature and a first insulating capping layer formed over a top surface of the first insulating fin base.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin, a second fin and a third fin therebetween. A first insulating structure includes a first insulating layer formed between the first and third fins, a capping structure covering the first insulating layer, a first insulating liner covering sidewall surfaces of the first insulating layer and the capping structure and a bottom surface of the first insulating layer, and a second insulating liner formed between the first insulating liner and the first fin and between the first insulating liner and the third fin. The second insulating structure includes a second insulating layer formed between the second fin and the third fin and a third insulating liner formed between the second insulating layer and the second fin and between the second insulating layer and the third fin.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a first fin, a second fin and a third fin therebetween. A first insulating structure includes a first insulating layer formed between the first and third fins, a capping structure covering the first insulating layer, a first insulating liner covering sidewall surfaces of the first insulating layer and the capping structure and a bottom surface of the first insulating layer, and a second insulating liner formed between the first insulating liner and the first fin and between the first insulating liner and the third fin. The second insulating structure includes a second insulating layer formed between the second fin and the third fin and a third insulating liner formed between the second insulating layer and the second fin and between the second insulating layer and the third fin.

Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate. A first gate structure and a second gate structure are across the first and second fins, respectively. An insulating structure is formed between the first gate structure and the second gate structure and includes a first insulating layer separating the first fin from the second fin, a capping structure formed in the first insulating layer, and a second insulating layer covered by the first insulating layer and the capping structure.

Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Abstract: A device includes a semiconductor fin protruding from a substrate, a first gate stack over the semiconductor fin and a second gate stack over the semiconductor fin, a first source/drain region in the semiconductor fin adjacent the first gate stack and a second source/drain region in the semiconductor fin adjacent the second gate stack, a first layer of a first dielectric material on the first gate stack and a second layer of the first dielectric material on the second gate stack, a first source/drain contact on the first source/drain region and adjacent the first gate stack, a first layer of a second dielectric material on a top surface of the first source/drain contact, and a second source/drain contact on the second source/drain region and adjacent the second gate stack, wherein the top surface of the second source/drain contact is free of the second dielectric material.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate. A first gate structure and a second gate structure are across the first and second fins, respectively. An insulating structure is formed between the first gate structure and the second gate structure and includes a first insulating layer separating the first fin from the second fin, a capping structure formed in the first insulating layer, and a second insulating layer covered by the first insulating layer and the capping structure.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate. The semiconductor device structure also includes an insulating structure that includes a first insulating layer formed between and separating from the first fin and the second fin, a second insulating layer embedded in the first insulating layer, a first capping layer formed in the first insulating layer to cover a top surface of the second insulating layer, and a second capping layer in the first capping layer.

Abstract: A device includes a semiconductor fin protruding from a substrate, a first gate stack over the semiconductor fin and a second gate stack over the semiconductor fin, a first source/drain region in the semiconductor fin adjacent the first gate stack and a second source/drain region in the semiconductor fin adjacent the second gate stack, a first layer of a first dielectric material on the first gate stack and a second layer of the first dielectric material on the second gate stack, a first source/drain contact on the first source/drain region and adjacent the first gate stack, a first layer of a second dielectric material on a top surface of the first source/drain contact, and a second source/drain contact on the second source/drain region and adjacent the second gate stack, wherein the top surface of the second source/drain contact is free of the second dielectric material.

Abstract: A chemical mechanical planarization (CMP) tool includes a platen and a polishing pad attached to the platen, where a first surface of the polishing pad facing away from the platen includes a first polishing zone and a second polishing zone, where the first polishing zone is a circular region at a center of the first surface of the polishing pad, and the second polishing zone is an annular region around the first polishing zone, where the first polishing zone and the second polishing zone have different surface properties.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate. The semiconductor device structure also includes an insulating structure that includes a first insulating layer formed between and separating from the first fin and the second fin, a second insulating layer embedded in the first insulating layer, a first capping layer formed in the first insulating layer to cover a top surface of the second insulating layer, and a second capping layer in the first capping layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate, an isolation feature between and adjacent to the first fin and the second fin, and a fin isolation structure between the first fin and the second fin. The fin isolation structure includes a first insulating layer partially embedded in the isolation feature, a second insulating layer having sidewall surfaces and a bottom surface that are covered by the first insulating layer, a first capping layer covering the second insulating layer and having sidewall surfaces that are covered by the first insulating layer, and a second capping layer having sidewall surfaces and a bottom surface that are covered by the first capping layer.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having adjacent first and second fins protruding from the substrate, an isolation feature between and adjacent to the first fin and the second fin, and a fin isolation structure between the first fin and the second fin. The fin isolation structure includes a first insulating layer partially embedded in the isolation feature, a second insulating layer having sidewall surfaces and a bottom surface that are covered by the first insulating layer, a first capping layer covering the second insulating layer and having sidewall surfaces that are covered by the first insulating layer, and a second capping layer having sidewall surfaces and a bottom surface that are covered by the first capping layer.

Abstract: An (acid-substituted polyaniline)-grafted hydrogel copolymer is provided. The (acid-substituted polyaniline)-grafted hydrogel copolymer has a general formula as below: wherein A is a proton acid group, m and n are same or different integers greater than 0, x is an integer equal to or greater than 0, and y is an integer equal to or greater than 1, provided that x and y are the same or different at each occurrence, and at least an x is not 0. The (acid-substituted polyaniline)-grafted hydrogel copolymer is formed by the polymerization and substitution reaction between chitosan, polyaniline, and proton acid. The (acid-substituted polyaniline)-grafted hydrogel copolymer behaves as a pH-responsive hydrogel with photo-thermal properties and can be applied to photo-thermal therapy.

Abstract: An (acid-substituted polyaniline)-grafted hydrogel copolymer is provided. The (acid-substituted polyaniline)-grafted hydrogel copolymer has a general formula as below: wherein A is a proton acid group, m and n are same or different integers greater than 0, x is an integer equal to or greater than 0, and y is an integer equal to or greater than 1, provided that x and y are the same or different at each occurrence, and at least an x is not 0. The (acid-substituted polyaniline)-grafted hydrogel copolymer is formed by the polymerization and substitution reaction between chitosan, polyaniline, and proton acid. The (acid-substituted polyaniline)-grafted hydrogel copolymer behaves as a pH-responsive hydrogel with photo-thermal properties and can be applied to photo-thermal therapy.

Abstract: An (acid-substituted polyaniline)-grafted hydrogel copolymer is provided. The (acid-substituted polyaniline)-grafted hydrogel copolymer has a general formula as below: The A is a proton acid group. The (acid-substituted polyaniline)-grafted hydrogel copolymer is formed by the polymerization and substitution reaction between chitosan, polyaniline, and proton acid. The (acid-substituted polyaniline)-grafted hydrogel copolymer behaves as a pH-responsive hydrogel with photo-thermal properties and can be applied to photo-thermal therapy.