Patents by Inventor Chunyan Xin
Chunyan Xin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9236240Abstract: A semiconductor device and a method for forming a device are presented. A wafer substrate having first and second regions is provided. The second region includes an inner region of the substrate while the first region includes an outer peripheral region from an edge of the substrate towards the inner region. A protection unit is provided above the substrate. The protection unit includes a region having a total width WT defined by outer and inner rings of the protection unit. The substrate is etched to form at least a trench in the second region of the substrate. The WT of the protection unit is sufficiently wide to protect the first region of the wafer substrate such that the first region is devoid of trench.Type: GrantFiled: February 28, 2013Date of Patent: January 12, 2016Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Qiaoming Cai, Wurster Kai, Chunyan Xin, Frank Jakubowski
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Publication number: 20140239454Abstract: A semiconductor device and a method for forming a device are presented. A wafer substrate having first and second regions is provided. The second region includes an inner region of the substrate while the first region includes an outer peripheral region from an edge of the substrate towards the inner region. A protection unit is provided above the substrate. The protection unit includes a region having a total width WT defined by outer and inner rings of the protection unit. The substrate is etched to form at least a trench in the second region of the substrate. The WT of the protection unit is sufficiently wide to protect the first region of the wafer substrate such that the first region is devoid of trench.Type: ApplicationFiled: February 28, 2013Publication date: August 28, 2014Applicant: GLOBALFOUNDRIES SINGAPORE PTE. LTD.Inventors: Qiaoming CAI, Wurster KAI, Chunyan XIN, Frank JAKUBOWSKI
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Patent number: 7932127Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.Type: GrantFiled: February 4, 2010Date of Patent: April 26, 2011Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianping Yang, Jieguang Huo, Chunyan Xin
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Publication number: 20100136737Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.Type: ApplicationFiled: February 4, 2010Publication date: June 3, 2010Applicant: Semiconductor Manufacturing InternationalInventors: Jianping Yang, Jieguang Huo, Chunyan Xin
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Patent number: 7582522Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.Type: GrantFiled: December 18, 2007Date of Patent: September 1, 2009Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
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Publication number: 20080128770Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.Type: ApplicationFiled: December 18, 2007Publication date: June 5, 2008Applicant: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
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Patent number: 7335546Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.Type: GrantFiled: July 19, 2005Date of Patent: February 26, 2008Assignee: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
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Publication number: 20060292730Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.Type: ApplicationFiled: July 19, 2005Publication date: December 28, 2006Applicant: Semiconductor Manufacturing International (Shanghai) CorporationInventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
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Publication number: 20060275945Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.Type: ApplicationFiled: October 25, 2005Publication date: December 7, 2006Applicant: Semiconductor Manufacturing Int'l (Shanghai) CorporationInventors: Jianping Yang, Jieguang Huo, Chunyan Xin