Patents by Inventor Chunyan Xin

Chunyan Xin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9236240
    Abstract: A semiconductor device and a method for forming a device are presented. A wafer substrate having first and second regions is provided. The second region includes an inner region of the substrate while the first region includes an outer peripheral region from an edge of the substrate towards the inner region. A protection unit is provided above the substrate. The protection unit includes a region having a total width WT defined by outer and inner rings of the protection unit. The substrate is etched to form at least a trench in the second region of the substrate. The WT of the protection unit is sufficiently wide to protect the first region of the wafer substrate such that the first region is devoid of trench.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: January 12, 2016
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Qiaoming Cai, Wurster Kai, Chunyan Xin, Frank Jakubowski
  • Publication number: 20140239454
    Abstract: A semiconductor device and a method for forming a device are presented. A wafer substrate having first and second regions is provided. The second region includes an inner region of the substrate while the first region includes an outer peripheral region from an edge of the substrate towards the inner region. A protection unit is provided above the substrate. The protection unit includes a region having a total width WT defined by outer and inner rings of the protection unit. The substrate is etched to form at least a trench in the second region of the substrate. The WT of the protection unit is sufficiently wide to protect the first region of the wafer substrate such that the first region is devoid of trench.
    Type: Application
    Filed: February 28, 2013
    Publication date: August 28, 2014
    Applicant: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Qiaoming CAI, Wurster KAI, Chunyan XIN, Frank JAKUBOWSKI
  • Patent number: 7932127
    Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: April 26, 2011
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Jieguang Huo, Chunyan Xin
  • Publication number: 20100136737
    Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.
    Type: Application
    Filed: February 4, 2010
    Publication date: June 3, 2010
    Applicant: Semiconductor Manufacturing International
    Inventors: Jianping Yang, Jieguang Huo, Chunyan Xin
  • Patent number: 7582522
    Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: September 1, 2009
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
  • Publication number: 20080128770
    Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 5, 2008
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
  • Patent number: 7335546
    Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.
    Type: Grant
    Filed: July 19, 2005
    Date of Patent: February 26, 2008
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
  • Publication number: 20060292730
    Abstract: A method and device for image sensing. The method includes forming a first well and a second well in a substrate, forming a gate oxide layer on the substrate, and depositing a first gate region and a second gate region on the gate oxide layer. The first gate region is associated with the first well, and the second gate region is associated with the second well. Additionally, the method includes forming a third well in the substrate, implanting a first plurality of ions to form a first lightly doped source region and a first lightly doped drain region in the first well, implanting a second plurality of ions to form at least a second lightly doped drain region in the second well, and implanting a third plurality of ions to form a source in the second well.
    Type: Application
    Filed: July 19, 2005
    Publication date: December 28, 2006
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jianping Yang, Chunyan Xin, Jieguang Huo, Yanyong Wang
  • Publication number: 20060275945
    Abstract: Techniques for manufacturing a CMOS image sensor are provided. A semiconductor substrate is provided, and at least one isolation region can be formed between a periphery region of the substrate and a photo-sensing region of the substrate. A first well in the periphery region and a second well in the photo-sensing region of the substrate are formed. A third well associated with a photodiode is also formed. A gate oxide layer, polysilicon layer, and first metal layer are respectively deposited. The polysilicon layer and first metal layer are etched to form an least one gate in the photo-sensing region and at least one gate in the periphery region. At least two doped regions in the first well are formed, as well as a doped region in the second well. A silicide block layer is deposited over the photo-sensing region of the substrate. A second metal layer is deposited at least over the periphery region after deposition of the silicide block. The substrate is exposed to a thermal environment to form silicide.
    Type: Application
    Filed: October 25, 2005
    Publication date: December 7, 2006
    Applicant: Semiconductor Manufacturing Int'l (Shanghai) Corporation
    Inventors: Jianping Yang, Jieguang Huo, Chunyan Xin