Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.

Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.

Abstract: The present application discloses a semiconductor structure and methods for manufacturing semiconductor structures. The semiconductor structure includes a plurality of bottom dies and a top die stacked on the bottom dies. The bottom dies receive power supplies through tiny through silicon vias (TSVs) formed in backside substrates of the bottom dies, while the top die receives power supplies through dielectric vias (TDVs) formed in a dielectric layer that covers the bottom dies. By enabling backside power delivery to the bottom die, more space can be provided for trace routing between stacked dies. Therefore, greater computation capability can be achieved within a smaller chip area with less power loss.

Abstract: The present disclosure provides an automatic power control circuit and method, and a laser diode circuit comprising the automatic power control circuit. The automatic power control circuit comprises: a voltage measurement unit configured to obtain an indicative voltage at a specific measurement point and output the indicative voltage to a processor, wherein the indicative voltage is configured to indicate a forward voltage of a laser diode in laser emitting state; and the processor configured to output a pulse parameter control signal in response to change in the indicative voltage, wherein the pulse parameter control signal is used to control an adjustment for a pulse parameter of laser pulses of the laser diode, such that laser emission power is within a preset range, and wherein the pulse parameter of the laser pulses of the laser diode is used to set a total duration of pulses within a preset time period.

Abstract: A capacitive touch circuit includes a single comparator, a reference voltage control unit, a resistance adjusting unit, a delay unit, and a relaxation oscillation control unit. The comparator has a first input terminal, a second input terminal, and an output terminal. The reference voltage control unit is electrically connected to the second input terminal and includes a high level voltage source, a low level voltage source, and a voltage switching controller. The voltage switching controller electrically connects either the high level voltage source or the low level voltage source to the second input terminal of the single comparator according to an output signal of the single comparator. The relaxation oscillation control unit is electrically connected to the resistance adjusting unit, the delay unit, and the reference voltage control unit.

Abstract: A capacitive touch circuit includes a single comparator, a reference voltage control unit, a resistance adjusting unit, a delay unit, and a relaxation oscillation control unit. The comparator has a first input terminal, a second input terminal, and an output terminal. The reference voltage control unit is electrically connected to the second input terminal and includes a high level voltage source, a low level voltage source, and a voltage switching controller. The voltage switching controller electrically connects either the high level voltage source or the low level voltage source to the second input terminal of the single comparator according to an output signal of the single comparator. The relaxation oscillation control unit is electrically connected to the resistance adjusting unit, the delay unit, and the reference voltage control unit.