Abstract: A serial-connection and parallel-communication fast interface for a PLC host and an expansion device includes a PLC host, at least one expansion device and shared bus comprising address lines, data lines, control lines and I/O addressing lines. The PLC host comprises an initial address output circuit and outputting a clamping value to the expander through an output addressing line. The expansion device includes a microprocessor, a memory unit and a clamping and decoding circuit such that the expansion device can automatically allocate the order thereof and output the clamping value through the addressing line. The expansion device can automatically allow or block the data from the PLC host. Therefore, the problem of overlong communication time for data access, the augmentation of expansion device and order limitation can be saved.

Abstract: A serial-connection and parallel-communication fast interface for a PLC host and an expansion device includes a PLC host, at least one expansion device and shared bus comprising address lines, data lines, control lines and I/O addressing lines. The PLC host comprises an initial address output circuit and outputting a clamping value to the expander through an output addressing line. The expansion device includes a microprocessor, a memory unit and a clamping and decoding circuit such that the expansion device can automatically allocate the order thereof and output the clamping value through the addressing line. The expansion device can automatically allow or block the data from the PLC host. Therefore, the problem of overlong communication time for data access, the augmentation of expansion device and order limitation can be saved.

Abstract: A data transmission method for microprocessors is accomplished by using an I/O pin to transmit data signals while another one to transmit pulse-wave signals, wherein the data signal consists of a command code character, an initial address character, a data-length character, and at least one data-conception character, and each character consists of eight data bits, one parity bit, and one responding bit.

Abstract: A programmable logic controller, which removes the function of pulse wave transmission from a microprocessor and accomplishes it by using the microprocessor to output an command data, which defines the frequency and the number of the pulse waves, to a pulse-transmitting unit and, to execute the function of pulse wave transmission.